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MB91625 Series
- Harvard architecture allowing program access and data access to be executed simultaneously - Instruction prefetch function has been added with 4 word instruction queue of CPU * Instruction compatible with FR family CPU - Additional bit search instructions - No resource instructions and coprocessor instructions * Maximum operating frequency * CPU : 60 MHz * Resources : 40 MHz * DMA controller (DMAC) * 8 channels * Address space : 32 bits (4 Gbytes) * Transfer modes : Block transfer/burst transfer/demand transfer * Address update : Increment/decrement/fixed (increment/decrement step size of 1, 2, or 4) * Transfer data length : Selectable from 8-bit, 16-bit, 32-bit * Block size : 1 to 16 * Number of transfers : 1 to 65535 * Transfer requests - Requests from software - Interrupt requests from peripheral resources (interrupt requests are shared, including external interrupts) * Reload functions : Reload can be specified on all channels * Priority order : Fixed (ch.0 > ch.1 > ch.2 > ch.3 > ...) or round-robin * Interrupt requests : Interrupts can be generated for transfer complete, transfer error, and transfer interrupted. * Multifunction serial interface * 4 channels with 16-byte FIFO, 8 channels without FIFO * Operation mode is selectable from the followings for each channel (For ch.0, I2C is not available.) * UART - Full-duplex double buffer - Selectable parity on/off - Built-in dedicated baud rate generator - External clock can be used as a serial clock - Error detection function for parity, frame and overrun errors * CSIO - Full-duplex double buffer - Built-in dedicated baud rate generator - Overrun error detection function * I2C - Supports both standard mode (Max 100 kbps)and Fast mode (Max 400 kbps) - Some channels are 5 V tolerant * Interrupts * Total of 32 external interrupts (some pins are 5 V tolerant) * Interrupts from peripheral resources * Programmable interrupt levels (16 levels) * Can be used to return from stop mode, sleep mode (Continued)
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(Continued) * Clock generation * Main clock (MCLK) oscillator * Sub clock (SBCLK) oscillator * PLL clock (PLLCLK) oscillator * Low-power dissipation mode * Stop mode * Watch mode * Sleep mode * Doze mode * Clock division function * Other features * I/O port * INIT pin is provided as a reset pin * Watchdog timer reset, software reset * Delay interrupt * Power supply : Single power supply (2.7 V to 3.6 V)
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Pin no. LQFP-100 Pin name P34 TIOA14 SOUT7 (SDA7) OUT4 INT12 P35 TIOB14 9 SIN7 OUT5 INT13 P36 TIOA15 SCK7 (SCL7) OUT6 INT14 P37 11 TIOB15 OUT7 INT15 P40 12 SOUT8 (SDA8)
I/O circuit type*1
Function General-purpose I/O port Base timer ch.14 TIOA pin Multifunction serial interface ch.7 output pin. This pin operates as SOUT7 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA7 when it is used in an I2C (operation mode 4). 32-bit output compare ch.4 output pin External interrupt request 12 input pin General-purpose I/O port Base timer ch.14 TIOB pin
CMOS level input
CMOS level hysteresis input
8
D*
2
D*
2
Multifunction serial interface ch.7 input pin 32-bit output compare ch.5 output pin External interrupt request 13 input pin General-purpose I/O port Base timer ch.15 TIOA pin Multifunction serial interface ch.7 clock I/O pin. This pin operates as SCK7 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL7 when it is used in an I2C (operation mode 4). 32-bit output compare ch.6 output pin External interrupt request 14 input pin General-purpose I/O port Base timer ch.15 TIOB pin 32-bit output compare ch.7 output pin External interrupt request 15 input pin General-purpose I/O port
10
D*2
D*2
D*2
Multifunction serial interface ch.8 output pin. This pin operates as SOUT8 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA8 when it is used in an I2C (operation mode 4).
(Continued)
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Pin no. LQFP-100 13 Pin name P41 SIN8 P42 14 SCK8 (SCL8) P43 P44 16 SOUT9 (SDA9) P45 SIN9 P46 18 SCK9 (SCL9) P47 INIT
I/O circuit type*1 D*2
Function General-purpose I/O port Multifunction serial interface ch.8 input pin General-purpose I/O port
CMOS level input
CMOS level hysteresis input
D*2
Multifunction serial interface ch.8 clock I/O pin. This pin operates as SCK8 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL8 when it is used in an I2C (operation mode 4). General-purpose I/O port General-purpose I/O port Multifunction serial interface ch.9 output pin. This pin operates as SOUT9 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA9 when it is used in an I2C (operation mode 4). General-purpose I/O port Multifunction serial interface ch.9 input pin General-purpose I/O port Multifunction serial interface ch.9 clock I/O pin. This pin operates as SCK9 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL9 when it is used in an I2C (operation mode 4). General-purpose I/O port External reset input pin. A reset is valid when INIT = L. The I/O circuit type for the Flash memory products is P. Mode 0 pin. The I/O circuit type for the Flash memory products is P. During normal operation, MD0 = L must be input. During serial programming to Flash memory, MD0 = H must be input. Mode 1 pin. Input must always be at the "L" level. The I/O circuit type for the Flash memory products is P. Main clock (oscillation) input pin Main clock (oscillation) I/O pin GND pin
15
D*2
D*2
17
D*2
D*2
19 20
D*2 P
21
MD0
P
22 23 24 25
MD1 X0 X1 VSS
P A A
(Continued)
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MB91625 Series
Pin no. LQFP-100 Pin name P75 AN5
I/O circuit type*1
Function General-purpose I/O port 10-bit A/D converter ch.5 analog input pin Multifunction serial interface ch.0 output pin. This pin operates as SOUT0 when it is used in a UART/CSIO (operation modes 0 to 2). 16-bit reload timer ch.0 input pin 32-bit output compare ch.5 output pin (Port 1) External interrupt request 21 input pin General-purpose I/O port 10-bit A/D converter ch.6 analog input pin Multifunction serial interface ch.0 input pin 16-bit reload timer ch.1 input pin 32-bit output compare ch.6 output pin (Port 1) External interrupt request 22 input pin General-purpose I/O port 10-bit A/D converter ch.7 analog input pin Multifunction serial interface ch.0 clock I/O pin. This pin operates as SCK0 when it is used in a UART/ CSIO (operation modes 0 to 2). 16-bit reload timer ch.2 input pin 32-bit output compare ch.7 output pin (Port 1) External interrupt request 23 input pin General-purpose I/O port 10-bit A/D converter ch.8 analog input pin 32-bit input capture ch.0 input pin (Port 1) External interrupt request 24 input pin
CMOS level input
CMOS level hysteresis input
34
SOUT0
E
TMI0 OUT5_1 INT21 P76 AN6 35 SIN0 TMI1 OUT6_1 INT22 P77 AN7 E
(Continued)
36
SCK0
E
TMI2 OUT7_1 INT23 P80 37 AN8 IN0_1 INT24 E
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MB91625 Series
Pin no. LQFP-100 Pin name P81 38 AN9 IN1_1 INT25 P82 39 AN10 IN2_1 INT26 P83 40 AN11 IN3_1 INT27 P84 41 AN12 IN4_1 INT28 P85 42 AN13 IN5_1 INT29 P86 43 AN14 IN6_1 INT30 P87 44 AN15 IN7_1 INT31 45 46 47 AVCC AVRH AVSS
I/O circuit type*1
Function General-purpose I/O port
CMOS level input
CMOS level hysteresis input
E
10-bit A/D converter ch.9 analog input pin 32-bit input capture ch.1 input pin (Port 1) External interrupt request 25 input pin General-purpose I/O port 10-bit A/D converter ch.10 analog input pin 32-bit input capture ch.2 input pin (Port 1) External interrupt request 26 input pin General-purpose I/O port 10-bit A/D converter ch.11 analog input pin 32-bit input capture ch.3 input pin (Port 1) External interrupt request 27 input pin General-purpose I/O port 10-bit A/D converter ch.12 analog input pin 32-bit input capture ch.4 input pin (Port 1) External interrupt request 28 input pin General-purpose I/O port 10-bit A/D converter ch.13 analog input pin 32-bit input capture ch.5 input pin (Port 1) External interrupt request 29 input pin General-purpose I/O port 10-bit A/D converter ch.14 analog input pin 32-bit input capture ch.6 input pin (Port 1) External interrupt request 30 input pin General-purpose I/O port 10-bit A/D converter ch.15 analog input pin 32-bit input capture ch.7 input pin (Port 1) External interrupt request 31 input pin 10-bit A/D converter and 8-bit D/A converter analog power pin 10-bit A/D converter analog reference voltage input pin 10-bit A/D converter and 8-bit D/A converter GND pin
E
E
E
E
E
E

(Continued)
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Pin no. LQFP-100 Pin name P50
I/O circuit type*1
Function General-purpose I/O port Multifunction serial interface ch.10 output pin. This pin operates as SOUT10 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA10 when it is used in an I2C (operation mode 4). Up/Down counter ch.0 AIN input pin (Port 1) General-purpose I/O port
CMOS level input
CMOS level hysteresis input
61
SOUT10 (SDA10)
C
AIN0_1 P51 62 SIN10 BIN0_1 P52 C

Multifunction serial interface ch.10 input pin Up/Down counter ch.0 BIN input pin (Port 1) General-purpose I/O port Multifunction serial interface ch.10 clock I/O pin. This pin operates as SCK10 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL10 when it is used in an I2C (operation mode 4). Up/Down counter ch.0 ZIN input pin (Port 1) General-purpose I/O port
63
SCK10 (SCL10)
C
ZIN0_1 P53 64 FRCK1 INT21_2 P54 C

32-bit free-run timer ch.1 external clock input pin External interrupt request 21 input pin (Port 2) General-purpose I/O port Multifunction serial interface ch.11 output pin. This pin operates as SOUT11 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA11 when it is used in an I2C (operation mode 4). Up/Down counter ch.1 AIN input pin (Port 1) General-purpose I/O port Multifunction serial interface ch.11 input pin Up/Down counter ch.1 BIN input pin (Port 1) 10-bit A/D converter external trigger input pin
65
SOUT11 (SDA11)
C
AIN1_1 P55 66 SIN11 BIN1_1 ADTRG0 C
(Continued)
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Pin no. LQFP-100 Pin name P56
I/O circuit type*1
Function General-purpose I/O port Multifunction serial interface ch.11 clock I/O pin. This pin operates as SCK11 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL11 when it is used in an I2C (operation mode 4). Up/Down counter ch.1 ZIN input pin (Port 1) 32-bit free-run timer ch.0 external clock input pin
CMOS level input
CMOS level hysteresis input
67
SCK11 (SCL11)
C
ZIN1_1 FRCK0 68 69 70 71 P57 P60 AIN2_1 P61 BIN2_1 P62 ZIN2_1 P63 72 FRCK1_1 INT22_2 73 P64 AIN3_1 P65 74 BIN3_1 ADTRG0_ 1 P66 75 ZIN3_1 FRCK0_1 76 P67 INT23_2 C C C C C C C C C
(Continued)
General-purpose I/O port General-purpose I/O port Up/Down counter ch.2 AIN input pin (Port 1) General-purpose I/O port Up/Down counter ch.2 BIN input pin (Port 1) General-purpose I/O port Up/Down counter ch.2 ZIN input pin (Port 1) General-purpose I/O port 32-bit free-run timer ch.1 external clock input pin (Port 1) External interrupt request 22 input pin (Port 2) General-purpose I/O port Up/Down counter ch.3 AIN input pin (Port 1) General-purpose I/O port Up/Down counter ch.3 BIN input pin (Port 1) 10-bit A/D converter external trigger input pin (Port 1) General-purpose I/O port Up/Down counter ch.3 ZIN input pin (Port 1) 32-bit free-run timer ch.0 external clock input pin (Port 1) General-purpose I/O port External interrupt request 23 input pin (Port 2)
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MB91625 Series
Pin no. LQFP-100 Pin name P06 TIOA3 83 SCK1 (SCL1) IN6 P07 84 TIOB3 IN7 P10 TIOA4
I/O circuit type*1
Function General-purpose I/O port Base timer ch.3 TIOA pin
CMOS level input
CMOS level hysteresis input
C
Multifunction serial interface ch.1 clock I/O pin. This pin operates as SCK1 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL1 when it is used in an I2C (operation mode 4). 32-bit input capture ch.6 input pin General-purpose I/O port
C
Base timer ch.3 TIOB pin 32-bit input capture ch.7 input pin General-purpose I/O port Base timer ch.4 TIOA pin Multifunction serial interface ch.2 output pin. This pin operates as SOUT2 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA2 when it is used in an I2C (operation mode 4). Up/Down counter ch.0 AIN input pin External interrupt request 0 input pin General-purpose I/O port Base timer ch.4 TIOB pin
85
SOUT2 (SDA2)
C
AIN0 INT0 P11 TIOB4 86 SIN2 BIN0 INT1 P12 TIOA5 SCK2 (SCL2) ZIN0 INT2 P13 88 TIOB5 INT3 C C
(Continued)
Multifunction serial interface ch.2 input pin Up/Down counter ch.0 BIN input pin External interrupt request 1 input pin General-purpose I/O port Base timer ch.5 TIOA pin Multifunction serial interface ch.2 clock I/O pin. This pin operates as SCK2 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL2 when it is used in an I2C (operation mode 4). Up/Down counter ch.0 ZIN input pin External interrupt request 2 input pin General-purpose I/O port Base timer ch.5 TIOB pin External interrupt request 3 input pin
87
C
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MB91625 Series
Pin no. LQFP-100 Pin name P14 TIOA6 SOUT3 (SDA3) AIN1 INT4 P15 TIOB6 90 SIN3 BIN1 INT5 P16 TIOA7 SCK3 (SCL3) ZIN1 INT6 P17 92 TIOB7 INT7 P20 TIOA8 93 SOUT4 (SDA4) AIN2 P21 94 TIOB8 SIN4 BIN2
I/O circuit type*1
Function General-purpose I/O port Base timer ch.6 TIOA pin Multifunction serial interface ch.3 output pin. This pin operates as SOUT3 when the product is used in a UART/CSIO (operation modes 0 to 2) and as SDA3 when it is used in an I2C (operation mode 4). Up/Down counter ch.1 AIN input pin External interrupt request 4 input pin General-purpose I/O port Base timer ch.6 TIOB pin
CMOS level input
CMOS level hysteresis input
89
C
C
Multifunction serial interface ch.3 input pin Up/Down counter ch.1 BIN input pin External interrupt request 5 input pin General-purpose I/O port Base timer ch.7 TIOA pin Multifunction serial interface ch.3 clock I/O pin. This pin operates as SCK3 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL3 when it is used in an I2C (operation mode 4). Up/Down counter ch.1 ZIN input pin External interrupt request 6 input pin General-purpose I/O port
91
C
C
Base timer ch.7 TIOB pin External interrupt request 7 input pin General-purpose I/O port Base timer ch.8 TIOA pin
D*2
Multifunction serial interface ch.4 output pin. This pin operates as SOUT4 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA4 when it is used in an I2C (operation mode 4). Up/Down counter ch.2 AIN input pin General-purpose I/O port Base timer ch.8 TIOB pin Multifunction serial interface ch.4 input pin Up/Down counter ch.2 BIN input pin
D*2
(Continued)
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(Continued) Pin no. LQFP-100 Pin name P22 TIOA9 95 SCK4 (SCL4) ZIN2 96 P23 TIOB9 P24 TIOA10 SOUT5 (SDA5) AIN3 OUT0 P25 TIOB10 98 SIN5 BIN3 OUT1 P26 TIOA11 SCK5 (SCL5) ZIN3 OUT2 100 VCC D*2 D*2 D*2
I/O circuit type*1
Function General-purpose I/O port Base timer ch.9 TIOA pin Multifunction serial interface ch.4 clock I/O pin. This pin operates as SCK4 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL4 when it is used in an I2C (operation mode 4). Up/Down counter ch.2 ZIN input pin General-purpose I/O port Base timer ch.9 TIOB pin General-purpose I/O port Base timer ch.10 TIOA pin Multifunction serial interface ch.5 output pin. This pin operates as SOUT5 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA5 when it is used in an I2C (operation mode 4). Up/Down counter ch.3 AIN input pin 32-bit output compare ch.0 output pin General-purpose I/O port Base timer ch.10 TIOB pin Multifunction serial interface ch.5 input pin Up/Down counter ch.3 BIN input pin 32-bit output compare ch.1 output pin General-purpose I/O port Base timer ch.11 TIOA pin Multifunction serial interface ch.5 clock I/O pin. This pin operates as SCK5 when it is used in a UART/ CSIO (operation modes 0 to 2) and as SCL5 when it is used in an I2C (operation mode 4). Up/Down counter ch.3 ZIN input pin 32-bit output compare ch.2 output pin Power pin
CMOS level input
CMOS level hysteresis input
97
D*2
99
D*2

*1: Refer to " I/O CIRCUIT TYPE" for details on the I/O circuit types. *2: 5 V tolerant pin
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MB91625 Series
Type D
Circuit * * * *
Remarks CMOS level output CMOS level hysteresis input 5 V tolerant input With standby control
P-ch
Digital output
Note: When this pin is used as an I2C pin, the digital output P-ch transistor is always off.
N-ch R
Digital output
Digital input Standby control E * * * * * * CMOS level output CMOS level hysteresis input With input control Analog input With pull-up control With standby control
P-ch
P-ch
Digital output
N-ch
Digital output
R
Pull-up control Digital input Standby control Analog input
Input control (Continued)
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MB91625 Series
Type F
Circuit * * * * * *
Remarks CMOS level output CMOS level hysteresis input With input control Analog output With pull-up control With standby control
P-ch
P-ch
Digital output
N-ch
Digital output
R
Pull-up control Digital input Standby control Analog output
Output control I
X1A
P-ch N-ch R
Digital output Digital output
* Oscillation feedback resistance approx.10 M * CMOS level output * CMOS level hysteresis input * With standby control
Digital input Standby control Clock input
Standby control Digital input
R
X0A
P-ch N-ch
Standby control Digital output Digital output
(Continued) 22 DS07-16908-1E
MB91625 Series
(Continued) Type P
N-ch N-ch
Circuit
Remarks * Flash memory product only * CMOS level hysteresis input * High voltage control for testing Flash memory
Control pin
N-ch N-ch N-ch
Mode input
R
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MB91625 Series
PRECAUTIONS FOR HANDLING THE DEVICES
Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This page describes precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your FUJITSU MICROELECTRONICS semiconductor devices.
1. Precautions for Product Design
This section describes precautions when designing electronic equipment using semiconductor devices. * Absolute Maximum Ratings Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. * Recommended Operating Conditions The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. * Processing and Protection of Pins These precautions must be followed when handling the pins which connect semiconductor devices to power supply and input/output functions. (1) Preventing Over-Voltage and Over-Current Conditions Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to prevent such overvoltage or over-current conditions at the design stage. (2) Protection of Output Pins Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause large current flows. Such conditions if present for extended periods of time can damage the device. Therefore, avoid this type of connection. (3) Handling of Unused Input Pins Unconnected input pins with very high impedance levels can adversely affect stability of operation. Such pins should be connected through an appropriate resistance to a power supply pin or ground pin.
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* Baking Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU MICROELECTRONICS recommended conditions for baking. Condition: + 125 C / 24 h * Static Electricity Because semiconductor devices are particularly susceptible to damage by static electricity, you must take the following precautions: (a) Maintain relative humidity in the working environment between 40% and 70%. Use of an apparatus for ion generation may be needed to remove electricity. (b) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment. (c) Eliminate static body electricity by the use of rings or bracelets connected to ground through high resistance (on the level of 1 M). Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize shock loads is recommended. (d) Ground all fixtures and instruments, or protect with anti-static measures. (e) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board assemblies.
3. Precautions for Use Environment
Reliability of semiconductor devices depends on ambient temperature and other conditions as described above. For reliable performance, do the following: (1) Humidity Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high humidity levels are anticipated, consider anti-humidity processing. (2) Discharge of Static Electricity When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation. In such cases, use anti-static measures or processing to prevent discharges. (3) Corrosive Gases, Dust, or Oil Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect the devices. (4) Radiation, Including Cosmic Radiation Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users should provide shielding as appropriate. (5) Smoke, Flame Note: Plastic molded devices are flammable, and therefore should not be used near combustible substances. If devices begin to smoke or burn, there is danger of the release of toxic gases. Customers considering the use of FUJITSU MICROELECTRONICS products in other special environmental conditions should consult with sales representatives.
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MB91625 Series
HANDLING DEVICES
* Power supply pins In products with multiple VCC and VSS pins, respective pins at the same potential are interconnected within the device in order to prevent malfunctions such as latch-up. However, all of these pins should be connected externally to the power supply or ground lines in order to reduce electromagnetic emission levels, to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output current rating. Moreover, connect the current supply source with the VCC and VSS pins of this device at low impedance. It is also advisable that a ceramic capacitor of approximately 0.1 F be connected as a bypass capacitor between VCC and VSS pins near this device. * Crystal oscillator circuit Noise near the X0 and X1 pins may cause the device to malfunction. Design the printed circuit board so that X0, X1, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the device as possible. It is strongly recommended that the PC board artwork be designed such that the X0 and X1 pins are surrounded by ground plane as this is expected to produce stable operation. If a 32 kHz oscillator is used (X0A, X1A), use the PK2 pin for an input that changes as infrequently as possible. Furthermore, take steps such as shown in the following figure to prevent the X0A and PK2 wiring from running parallel to each other. If 32 kHz oscillation is not used, there are no limitations.
X0A
GND
PK2
* Using an external clock When using an external clock, the clock signal should be input to the X0 pin only and the X1 should be kept open. * Example of Using an External Clock
MB91625 series
X0
Open
X1
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* C Pin As MB91625 series includes an internal regulator, always connect a bypass capacitor of approximately 4.7 F to the C pin for use by the regulator.
C
MB91625 series
VSS
4.7 F
GND
* Mode pins (MD0, MD1) Connect the MD pin (MD0, MD1) directly to VCC or VSS pins. Design the printed circuit board such that the pullup/down resistance stays low, as well as the distance between the mode pins and VCC pins or VSS pins is as short as possible and the connection impedance is low, when the pins are pulled-up/down such as for switching the pin level and rewriting the Flash memory data. It is because of preventing the device erroneously switching to test mode due to noise. * Notes on power-on * To ensure that the internal regulator and the oscillator have stabilized immediately after the power is turned on, keep an "L" level input connected to the INIT pin for the duration of the regulator voltage stabilization wait time + the oscillator start time of the oscillator + the main oscillator stabilization wait time. * Turn power on/off in the following order Turning on : VCC AVCC AVRH Turning off : AVRH AVCC VCC Release the reset (INIT pin "L" level to "H" level) after the power supply has stabilized. * Caution on Operations during PLL Clock Mode On this microcontroller, if in case the crystal oscillator breaks off or an external reference clock input stops while the PLL clock mode is selected, a self-oscillator circuit contained in the PLL may continue its operation at its self-running frequency. However, FUJITSU MICROELECTRONICS will not guarantee results of operations if such failure occurs.
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MB91625 Series
BLOCK DIAGRAM
FR80 CPU
Step-down regulator
Internal program memory Flash memory
Crossbar switch
RAM
On-chip bus
DMAC, 8 channels
Peripheral bus bridge
Clock control 16-bit peripheral bus 32-bit peripheral bus
Watchdog timer
Clock generation
Interrupt controller Delay interrupt External interrupt, 32 channels Ports 16-bit reload timer, 3 channels Base timer, 16 channels Up/Down counter, 4 channels A/D converter, 16 channels (1 unit) D/A converter, 2 channels
Watch counter
32-bit free-run timer, 2 channels Ports
32-bit input capture, 8 channels
32-bit output compare, 8 channels Multifunction serial interface, 8 channels Multifunction serial interface with FIFO, 4 channels
Ports
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MEMORY SPACE
1. Memory Space
The FR family has 4 Gbytes of logical address space (232 addresses) available to the CPU by linear access. * Direct Addressing Areas The following areas in the address space are used as I/O areas. These areas are called direct addressing areas, and the address of an operand in these areas can be specified directly within an instruction. The size of the directly addressable area depends on the length of the data being accessed as follows. * Byte data access : 0000 0000H to 0000 00FFH * Half word data access : 0000 0000H to 0000 01FFH * Word data access : 0000 0000H to 0000 03FFH
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MB91625 Series
2. Memory Map
MB91F627 Flash 512 Kbytes RAM 48 Kbytes 0000 0000H I/O area (Direct addressing) 0000 0400H I/O area
0001 0000H
Reserved
0003 4000H 0004 0000H
Built-in RAM area 48 Kbytes Reserved
0008 0000H Flash area 512 Kbytes 000F 0000H 0010 0000H Small-sector area
Reserved
FFFF FFFFH
Notes: * Small sector area is related to flash products only. Please refer to "Flash Memory" in the "Hardware Manual" for more details. * Do not access the reserved areas.
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MB91625 Series
I/O MAP
[How to read the table] Address 0000 0000H Register +0 PDR0 [R/W] B, H XXXXXXXX WDTCR0 [R/W] B, H -0--0000 EIRR0 [R/W] B, H, W 000 0000 +1 PDR1 [R/W] B, H XXXXXXXX WDTCPR0 [R/W] B, H 00000000 ENIR0 [R/W] B, H, W 00000000 +2 PDR2 [R/W] B, H XXXXXXXXXXX ELVR0 [R/W] B, H, W 00000000 00000000 +3 PDR3 [R/W] B, H XXXXXXXX Block Port data register Watchdog timer External interrupt 0 to 7
0000 003CH
0000 0040H
Initial value after reset "1" : Initial value"1" "0" : Initial value"0" "X" : Initial value undefined " - " : Reserved bit or undefined bit Access unit (B : byte, H : half word, W : word)
: Reserved area
Read/write attribute "R" : Indicates that there is a read only bit. "R/W" : Indicates that there is a read/write bit. "W" : Indicates that there is a write only bit. Register name (column 1 of the register is at address 4n, column 2 is at address 4 n + 2...) Leftmost register address (For word-length access, column 1 of the register is the MSB of the data.) Notes: * When performing a data access, the addresses should be as below. - Word access : Address should be multiples of 4 (least significant 2 bits should be "00B") - Half word access : Address should be multiples of 2 (least significant bit should be "0B") - Byte access : * Do not access the reserved areas.
DS07-16908-1E
33
MB91625 Series
Address 0000 0000H 0000 0004H 0000 0008H 0000 000CH to 0000 0010H 0000 0014H 0000 0018H to 0000 001CH 0000 0020H to 0000 0038H 0000 003CH
Register +0 PDR0 [R/W] B,H XXXXXXXX PDR4 [R/W] B,H XXXXXXXX PDR8 [R/W] B,H XXXXXXXX +1 PDR1 [R/W] B,H XXXXXXXX PDR5 [R/W] B,H XXXXXXXX PDR9 [R/W] B,H -----XXX PDRK [R/W] B -----XXX +2 PDR2 [R/W] B,H XXXXXXXX PDR6 [R/W] B,H XXXXXXXX PDRA [R/W] B,H XXXXXXXX +3 PDR3 [R/W] B,H XXXXXXXX PDR7 [R/W] B,H XXXXXXXX
Block
Port data register
WDTCR0 [R/W] B,H -0--0000 EIRR0 [R/W] B,H,W 00000000 DICR [R/W] B -------0 TMRLRA0 [R/W] H XXXXXXXX XXXXXXXX TMRLRA1 [R/W] H XXXXXXXX XXXXXXXX TMRLRA2 [R/W] H XXXXXXXX XXXXXXXX WDTCPR0 [R/W] B,H 00000000 ENIR0 [R/W] B,H,W 00000000
Reserved
ELVR0 [R/W] B,H,W 00000000 00000000 TMR0 [R] H XXXXXXXX XXXXXXXX TMCSR0 [R/W] H --000000 --000000 TMR1 [R] H XXXXXXXX XXXXXXXX TMCSR1 [R/W] H --000000 --000000 TMR2 [R] H XXXXXXXX XXXXXXXX TMCSR2 [R/W] H --000000 --000000
Watchdog timer External interrupt 0 to 7 Delay interrupt 16-bit reload timer ch.0 16-bit reload timer ch.1 16-bit reload timer ch.2 (Continued)
0000 0040H
0000 0044H 0000 0048H 0000 004CH 0000 0050H 0000 0054H 0000 0058H 0000 005CH
34
DS07-16908-1E
MB91625 Series
Address
Register +0 SCR0 [R/W] B,H,W 0--00000 +1 SMR0 [R/W] B,H,W 000-0000 +2 SSR0 [R,R/W] B,H,W 0-000011 BGR10 [R/W] H,W 00000000 SSR1 [R,R/W] B,H,W 0-000011 BGR11 [R/W] H,W 00000000 SSR2 [R,R/W] B,H,W 0-000011 BGR12 [R/W] H,W 00000000 SSR3 [R,R/W] B,H,W 0-000011 BGR13 [R/W] H,W 00000000 ESCR3 [R/W] / IBSR3 [R,R/W] B,H,W*2 -0000000 BGR03 [R/W] H,W 00000000 ESCR2 [R/W] / IBSR2 [R,R/W] B,H,W*2 -0000000 BGR02 [R/W] H,W 00000000 +3 ESCR0 [R/W] B,H,W -0000000 BGR00 [R/W] H,W 00000000 ESCR1 [R/W] / IBSR1 [R,R/W] B,H,W*2 -0000000 BGR01 [R/W] H,W 00000000
Block
0000 0060H
0000 0064H
RDR0[R] / TDR0 [W] B,H,W*1 -------0 00000000 SCR1 [R/W] / IBCR1 [R,R/W] B,H,W*2 0--00000 SMR1 [R/W] B,H,W 000-0000
Multi-function serial interface ch.0
0000 0068H
0000 006CH
RDR1 [R] / TDR1[W] B,H,W*1 -------0 00000000 ISMK1 [R/W] B,H*2 -------SCR2 [R/W] / IBCR2 [R,R/W] B,H,W*2 0--00000 ISBA1 [R/W] B,H*2 -------SMR2 [R/W] B,H,W 000-0000
Multi-function serial interface ch.1
0000 0070H
0000 0074H
0000 0078H
RDR2 [R] / TDR2 [W] B,H,W*1 -------0 00000000 ISMK2 [R/W] B,H*2 -------SCR3 [R/W] / IBCR3 [R,R/W] B,H,W*2 0--00000 ISBA2 [R/W] B,H*2 -------SMR3 [R/W] B,H,W 000-0000
Multi-function serial interface ch.2
0000 007CH
0000 0080H
0000 0084H
RDR3 [R] / TDR3 [W] B,H,W*1 -------0 00000000 ISMK3 [R/W] B,H*2 -------ISBA3 [R/W] B,H*2 --------
Multi-function serial interface ch.3
0000 0088H
(Continued)
DS07-16908-1E
35
MB91625 Series
Address
Register +0 SCR4 [R/W] / IBCR4 [R,R/W] B,H,W*2 0--00000 +1 SMR4 [R/W] B,H,W 000-0000 +2 SSR4 [R,R/W] B,H,W 0-000011 BGR14 [R/W] H,W 00000000 SSR5 [R,R/W] B,H,W 0-000011 BGR15 [R/W] H,W 00000000 SSR6 [R,R/W] B,H,W 0-000011 BGR16 [R/W] H,W 00000000 SSR7 [R,R/W] B,H,W 0-000011 BGR17 [R/W] H,W 00000000 ESCR7 [R/W]/ IBSR7 [R,R/W] B,H,W*2 -0000000 BGR07 [R/W] H,W 00000000 ESCR6 [R/W] / IBSR6 [R,R/W] B,H,W*2 -0000000 BGR06 [R/W] H,W 00000000 ESCR5 [R/W] / IBSR5 [R,R/W] B,H,W*2 -0000000 BGR05 [R/W] H,W 00000000 +3 ESCR4 [R/W] / IBSR4 [R,R/W] B,H,W*2 -0000000 BGR04 [R/W] H,W 00000000
Block
0000 008CH
0000 0090H
RDR4 [R] / TDR4 [W] B,H,W*1 -------0 00000000 ISMK4 [R/W] B,H*2 -------SCR5 [R/W] / IBCR5 [R,R/W] B,H,W*2 0--00000 ISBA4 [R/W] B,H*2 -------SMR5 [R/W] B,H,W 000-0000
Multi-function serial interface ch.4
0000 0094H
0000 0098H
0000 009CH
RDR5 [R] / TDR5 [W] B,H,W*1 -------0 00000000 ISMK5 [R/W] B,H*2 -------SCR6 [R/W] / IBCR6 [R,R/W] B,H,W*2 0--00000 ISBA5 [R/W] B,H*2 -------SMR6 [R/W] B,H,W 000-0000
Multi-function serial interface ch.5
0000 00A0H
0000 00A4H
0000 00A8H
RDR6 [R] / TDR6 [W] B,H,W*1 -------0 00000000 ISMK6 [R/W] B,H*2 -------SCR7 [R/W] / IBCR7 [R,R/W] B,H,W*2 0--00000 ISBA6 [R/W] B,H*2 -------SMR7 [R/W] B,H,W 000-0000
Multi-function serial interface ch.6
0000 00ACH
0000 00B0H
0000 00B4H
RDR7 [R] / TDR7 [W] B,H,W*1 -------0 00000000 ISMK7 [R/W] B,H*2 -------ISBA7 [R/W] B,H*2 --------
Multi-function serial interface ch.7
0000 00B8H 0000 00BCH
Reserved (Continued)
36
DS07-16908-1E
MB91625 Series
Address
Register +0 RDRM0 [R] / TDRM0 [W] B,H,W 00000000 RDRM4 [R] / TDRM4 [W] B,H,W 00000000 +1 RDRM1 [R] / TDRM1 [W] B,H,W 00000000 RDRM5 [R] / TDRM5 [W] B,H,W 00000000 SCR8 [R/W] / IBCR8 [R,R/W] B,H,W*2 0--00000 SMR8 [R/W] B,H,W 000-0000 SSR8 [R,R/W] B,H,W 0-000011 BGR18 [R/W] H,W 00000000 FBYTE28 [R/W] B,H,W 00000000 SSR9 [R,R/W] B,H,W 0-000011 BGR19 [R/W] H,W 00000000 FBYTE29 [R/W] B,H,W 00000000 FBYTE19 [R/W] B,H,W 00000000 FBYTE18 [R/W] B,H,W 00000000 ESCR9 [R/W] / IBSR9 [R,R/W] B,H,W*2 -0000000 BGR09 [R/W] H,W 00000000 ESCR8 [R/W] / IBSR8 [R,R/W] B,H,W*2 -0000000 BGR08 [R/W] H,W 00000000 +2 RDRM2 [R] / TDRM2 [W] B,H,W 00000000 RDRM6 [R] / TDRM6 [W] B,H,W 00000000 SSEL4567 [R/W] B ------00 +3 RDRM3 [R] / TDRM3 [W] B,H,W 00000000 RDRM7 [R] / TDRM7 [W] B,H,W 00000000
Block
0000 00C0H
0000 00C4H
Multi-function serial interface data register (mirror)
SSEL0123 [R/W] B 0000 00C8H ------00 0000 00CCH
Multi-function serial interface serial clock selection Reserved
0000 00D0H
0000 00D4H
RDR8 [R] / TDR8 [W] B,H,W*1 -------0 00000000 ISMK8 [R/W] B,H*2 ISBA8 [R/W] B,H*2 --------------FCR18 [R/W] B,H,W ---00100 SCR9 [R/W] / IBCR9 [R,R/W] B,H,W*2 0--00000 FCR08 [R,R/W] B,H,W -0000000 SMR9 [R/W] B,H,W 000-0000
0000 00D8H
Multi-function serial interface ch.8 (FIFO)
0000 00DCH
0000 00E0H
0000 00E4H
RDR9 [R] / TDR9 [W] B,H,W*1 -------0 00000000 ISMK9 [R/W] B,H*2 ISBA9 [R/W] B,H*2 --------------FCR19 [R/W] B,H,W ---00100 FCR09 [R,R/W] B,H,W -0000000
0000 00E8H
Multi-function serial interface ch.9 (FIFO)
0000 00ECH
(Continued)
DS07-16908-1E
37
MB91625 Series
Address
Register +0 SCR10 [R/W] / IBCR10 [R,R/W] B,H,W*2 0--00000 +1 SMR10 [R/W] B,H,W 000-0000 +2 SSR10 [R,R/W] B,H,W 0-000011 BGR110 [R/W] H,W 00000000 +3 ESCR10 [R/W] / IBSR10 [R,R/W] B,H,W*2 -0000000 BGR010 [R/W] H,W 00000000
Block
0000 00F0H
0000 00F4H
RDR10 [R] / TDR10 [W] B,H,W*1 -------0 00000000 ISMK10 [R/W] B,H*2 -------FCR110 [R/W] B,H,W ---00100 SCR11 [R/W] / IBCR11 [R,R/W] B,H,W*2 0--00000 ISBA10 [R/W] B,H*2 --------
0000 00F8H
Multi-function serial interface ch.10 (FIFO)
0000 00FCH
FCR010 [R,R/W] FBYTE210 [R/W] FBYTE110 [R/W] B,H,W B,H,W B,H,W -0000000 00000000 00000000 SMR11 [R/W] B,H,W 000-0000 SSR11 [R,R/W] B,H,W 0-000011 BGR111 [R/W] H,W 00000000 ESCR11 [R/W] / IBSR11 [R,R/W] B,H,W*2 -0000000 BGR011 [R/W] H,W 00000000 Multi-function serial interface ch.11 (FIFO)
0000 0100H
0000 0104H
RDR11[R] / TDR11[W] B,H,W*1 -------0 00000000 ISMK11 [R/W] B,H*2 -------FCR111 [R/W] B,H,W ---00100 EIRR1 [R/W] B,H,W 00000000 EIRR2 [R/W] B,H,W 00000000 EIRR3 [R/W] B,H,W 00000000 ISBA11 [R/W] B,H*2 --------
0000 0108H
0000 010CH
FCR011 [R,R/W] FBYTE211 [R/W] FBYTE111 [R/W] B,H,W B,H,W B,H,W -0000000 00000000 00000000 ENIR1 [R/W] B,H,W 00000000 ENIR2 [R/W] B,H,W 00000000 ENIR3 [R/W] B,H,W 00000000 ELVR1 [R/W] B,H,W 00000000 00000000 ELVR2 [R/W] B,H,W 00000000 00000000 ELVR3 [R/W] B,H,W 00000000 00000000 External interrupt 8 to 15 External interrupt 16 to 23 External interrupt 24 to 31 Reserved (Continued)
0000 0110H
0000 0114H
0000 0118H 0000 011CH
38
DS07-16908-1E
MB91625 Series
Address
Register +0 ADCR0 [R/W] B,H 000-0000 SCCR0 [R,R/W] B,H 1000-000 PCCR0 [R,R/W] B,H 1000-000 PCIS0 [R/W] B 00000000 ADST00 [R/W] B,H 00100000 ADST10 [R/W] B,H 00100000 BT0TMR [R] H 00000000 00000000 BT0STC [R/W] B 0000-000 BT0TMCR [R/W] B,H -0000000 00000000 BT0PDUT / BT0PRLH / BT0DTBF [R/W] H XXXXXXXX XXXXXXXX BT1TMR [R] H 00000000 00000000 BT1STC [R/W] B 0000-000 BT1TMCR [R/W] B,H -0000000 00000000 BT1PDUT / BT1PRLH / BT1DTBF [R/W] H XXXXXXXX XXXXXXXX PFNS0[R/W] B,H ------00 +1 ADSR0 [R,R/W] B,H 00---000 SFNS0 [R/W] B,H ----0000 +2 SCFD0 [R] B,H XXXXXXXX XX-XXXXX SCIS10 [R/W] B,H 00000000 SCIS00 [R/W] B,H 00000000 +3
Block
0000 0120H
0000 0124H
0000 0128H
0000 012CH
PCFD0[R] B,H XXXXXXXX XXXXXXXX CMPD0 [R/W] B,H 00000000 ADSS10 [R/W] B,H 00000000 ADCT0 [R/W] B -----111 CMPCR0 [R/W] B,H 00000000 ADSS00 [R/W] B,H 00000000
A/D converter unit 0
0000 0130H
0000 0134H
0000 0138H 0000 013CH 0000 0140H 0000 0144H
Reserved
0000 0148H 0000 014CH 0000 0150H 0000 0154H
BT0PCSR / BT0PRLL [R/W] H XXXXXXXX XXXXXXXX
Base timer ch.0
0000 0158H 0000 015CH
BT1PCSR / BT1PRLL [R/W] H XXXXXXXX XXXXXXXX
Base timer ch.1
(Continued)
DS07-16908-1E
39
MB91625 Series
Address 0000 0160H 0000 0164H
Register +0 +1 +2 +3 BT2TMR [R] H 00000000 00000000 BT2STC [R/W] B 0000-000 BT2TMCR [R/W] B,H -0000000 00000000 BT2PDUT / BT2PRLH / BT2DTBF [R/W] H XXXXXXXX XXXXXXXX BT3TMR [R] H 00000000 00000000 BT3STC [R/W] B 0000-000 BT3TMCR [R/W] B,H -0000000 00000000 BT3PDUT / BT3PRLH / BT3DTBF [R/W] H XXXXXXXX XXXXXXXX DADR0 [R/W] B,H,W XXXXXXXX DACR1 [R/W] B,H,W -------0 DADR1 [R/W] B,H,W XXXXXXXX
Block
0000 0168H 0000 016CH 0000 0170H 0000 0174H
BT2PCSR / BT2PRLL [R/W] H XXXXXXXX XXXXXXXX
Base timer ch.2
0000 0178H
BT3PCSR / BT3PRLL [R/W] H XXXXXXXX XXXXXXXX BTSEL0123 [R/W] B 00000000 DACR0 [R/W] B,H,W -------0
Base timer ch.3
0000 017CH
0000 0180H 0000 0184H to 0000 018CH 0000 0190H to 0000 01A8H 0000 01ACH 0000 01B0H 0000 01B4H 0000 01B8H 0000 01BCH
D/A converter
ADCHE [R/W] B,H,W -1111111 11111111 11111111 11111111 IRPR0H [R] B 000----IRPR2H [R] B,H,W 0000---IRPR4H [R] B,H,W 0000---IRPR6H [R] B,H,W 0000--- IRPR1H [R] B,H 000-000IRPR1L [R] B,H 000-000-
Reserved A/D channel enable
IRPR2L [R] B,H,W IRPR3H [R] B,H,W IRPR3L [R] B,H,W 000----0000---00000--IRPR4L [R] B,H,W IRPR5H [R] B,H,W IRPR5L [R] B,H,W 000000-0000---0000---IRPR6L [R] B,H,W IRPR7H [R] B,H,W IRPR7L [R] B,H,W 0000---0000---0000----
Interrupt request batch read function
(Continued)
40
DS07-16908-1E
MB91625 Series
Address
Register +0 RCRH0 [W] H,W 00000000 +1 RCRL0 [W] B,H,W 00000000 +2 UDCRH0 [R] H,W 00000000 RCRH1 [W] H,W 00000000 RCRL1 [W] B,H,W 00000000 UDCRH1 [R] H,W 00000000 RCRH2 [W] H,W 00000000 RCRL2 [W] B,H,W 00000000 UDCRH2 [R] H,W 00000000 RCRH3 [W] H,W 00000000 RCRL3 [W] B,H,W 00000000 UDCRH3 [R] H,W 00000000 CPCLR0 [R/W] W 11111111 11111111 11111111 11111111 TCDT0 [R/W] W 00000000 00000000 00000000 00000000 TCCSH0 [R/W] B,H 0-----00 TCCSL0 [R/W] B,H -1-00000 UDCRL3 [R] B,H,W 00000000 CSR3 [R,R/W] B 00000000 UDCRL2 [R] B,H,W 00000000 CSR2 [R,R/W] B 00000000 UDCRL1 [R] B,H,W 00000000 CSR1 [R,R/W] B 00000000 +3 UDCRL0 [R] B,H,W 00000000 CSR0 [R,R/W] B 00000000
Block
0000 01C0H
0000 01C4H 0000 01C8H 0000 01CCH 0000 01D0H
CCR0 [R,R/W] B,H 00000000 -0001000
Up/down counter ch.0
Reserved
0000 01D4H 0000 01D8H 0000 01DCH 0000 01E0H
CCR1 [R,R/W] B,H 00000000 -0001000
Up/down counter ch.1
Reserved
0000 01E4H 0000 01E8H 0000 01ECH 0000 01F0H
CCR2 [R,R/W] B,H 00000000 -0001000
Up/down counter ch.2
Reserved
0000 01F4H 0000 01F8H 0000 01FCH 0000 0200H 0000 0204H
CCR3 [R,R/W] B,H 00000000 -0001000
Up/down counter ch.3
Reserved
32-bit Free-run timer ch.0
0000 0208H
(Continued)
DS07-16908-1E
41
MB91625 Series
Address 0000 020CH 0000 0210H 0000 0214H 0000 0218H 0000 021CH 0000 0220H 0000 0224H 0000 0228H 0000 022CH 0000 0230H 0000 0234H 0000 0238H 0000 023CH 0000 0240H
Register +0 +1 +2 +3 IPCP0 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP1 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP2 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP3 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ICS01 [R/W] B 00000000 ICS23 [R/W] B 00000000
Block
32-bit Input capture ch.0 to ch.3
IPCP4 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP5 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP6 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX IPCP7 [R] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ICS45 [R/W] B 00000000 ICS67 [R/W] B 00000000 32-bit Input capture ch.4 to ch.7
OCCP0 [R/W] W 00000000 00000000 00000000 00000000 OCCP1 [R/W] W 00000000 00000000 00000000 00000000 OCCP2 [R/W] W 00000000 00000000 00000000 00000000 OCCP3 [R/W] W 00000000 00000000 00000000 00000000 OCSH1 [R/W] B,H,W ---0--00 OCSL0 [R/W] B,H,W 0000--00 OCSH3 [R/W] B,H,W ---0--00 OCSL2 [R/W] B,H,W 0000--00 (Continued) 32-bit Output compare ch.0 to ch.3
0000 0244H
42
DS07-16908-1E
MB91625 Series
Address 0000 0248H 0000 024CH 0000 0250H 0000 0254H
Register +0 +1 +2 +3 OCCP4 [R/W] W 00000000 00000000 00000000 00000000 OCCP5 [R/W] W 00000000 00000000 00000000 00000000 OCCP6 [R/W] W 00000000 00000000 00000000 00000000 OCCP7 [R/W] W 00000000 00000000 00000000 00000000 OCSH5 [R/W] B,H,W ---0--00 FRTSEL [R/W] B ------00 OCSL4 [R/W] B,H,W 0000--00 OCSH7 [R/W] B,H,W ---0--00 OCSL6 [R/W] B,H,W 0000--00
Block
32-bit Output compare ch.4 to ch.7
0000 0258H
0000 025CH 0000 0260H 0000 0264H
Free-run timer selector
CPCLR1 [R/W] W 11111111 11111111 11111111 11111111 TCDT1 [R/W] W 00000000 00000000 00000000 00000000 TCCSH1 [R/W] B,H 0-----00 TCCSL1 [R/W] B,H -1-00000 FCTLR [R/W] H -0--1011 ------- Reserved (Continued) WREN [R/W] B,H 00000000 00000000 FSTR [R] B -------1 32-bit Free-run timer ch.1
0000 0268H 0000 026CH to 0000 031CH 0000 0320H 0000 0324H to 0000 0334H 0000 0338H 0000 033CH 0000 0340H to 0000 037CH
Reserved Flash memory control Reserved
Wild register
DS07-16908-1E
43
MB91625 Series
Address 0000 0380H 0000 0384H 0000 0388H 0000 038CH 0000 0390H 0000 0394H 0000 0398H 0000 039CH 0000 03A0H 0000 03A4H 0000 03A8H 0000 03ACH 0000 03B0H
Register +0 +1 +2 +3 WRAR00 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR00 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR01 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR01 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR02 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR02 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR03 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR03 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR04 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR04 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR05 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR05 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR06 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX--
Block
Wild register
(Continued)
44
DS07-16908-1E
MB91625 Series
Address 0000 03B4H 0000 03B8H 0000 03BCH 0000 03C0H 0000 03C4H 0000 03C8H 0000 03CCH 0000 03D0H 0000 03D4H 0000 03D8H 0000 03DCH 0000 03E0H 0000 03E4H 0000 03E8H 0000 03ECH 0000 03F0H 0000 03F4H 0000 03F8H 0000 03FCH
Register +0 +1 +2 +3 WRDR06 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR07 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR07 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR08 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR08 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR09 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR09 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR10 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR10 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR11 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR11 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR12 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR12 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR13 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR13 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR14 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR14 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX WRAR15 [R/W] W -------- --XXXXXX XXXXXXXX XXXXXX-WRDR15 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
Block
Wild register
(Continued)
DS07-16908-1E
45
MB91625 Series
Address 0000 0400H 0000 0404H 0000 0408H 0000 040CH to 0000 0410H 0000 0414H 0000 0418H to 0000 041CH 0000 0420H 0000 0424H 0000 0428H 0000 042CH to 0000 0430H 0000 0434H 0000 0438H to 0000 043CH
Register +0 DDR0 [R/W] B,H 00000000 DDR4 [R/W] B,H 00000000 DDR8 [R/W] B,H 00000000 +1 DDR1 [R/W] B,H 00000000 DDR5 [R/W] B,H 00000000 DDR9 [R/W] B,H -----000 DDRK [R/W] B -----000 PCR0 [R/W] B,H 00000000 PCR8 [R/W] B,H 00000000 PCR1 [R/W] B,H 00000000 PCR5 [R/W] B 00000000 PCR9 [R/W] B,H -----000 PCRK [R/W] B -----0- PCR6 [R/W] B,H 00000000 PCRA [R/W] B 00000000 PCR7[R/W] B,H 00000000 +2 DDR2 [R/W] B,H 00000000 DDR6 [R/W] B,H 00000000 DDRA [R/W] B 00000000 +3 DDR3 [R/W] B,H 00000000 DDR7[R/W] B,H 00000000
Block
Data direction register
Pull-up control register
(Continued)
46
DS07-16908-1E
MB91625 Series
Address
Register +0 ICR00 [R,R/W] B,H,W ---11111 ICR04 [R,R/W] B,H,W ---11111 ICR08 [R,R/W] B,H,W ---11111 ICR12 [R,R/W] B,H,W ---11111 ICR16 [R,R/W] B,H,W ---11111 ICR20 [R,R/W] B,H,W ---11111 ICR24 [R,R/W] B,H,W ---11111 ICR28 [R,R/W] B,H,W ---11111 ICR32 [R,R/W] B,H,W ---11111 ICR36 [R,R/W] B,H,W ---11111 ICR40 [R,R/W] B,H,W ---11111 ICR44 [R,R/W] B,H,W ---11111 +1 ICR01 [R,R/W] B,H,W ---11111 ICR05 [R,R/W] B,H,W ---11111 ICR09 [R,R/W] B,H,W ---11111 ICR13 [R,R/W] B,H,W ---11111 ICR17 [R,R/W] B,H,W ---11111 ICR21 [R,R/W] B,H,W ---11111 ICR25 [R,R/W] B,H,W ---11111 ICR29 [R,R/W] B,H,W ---11111 ICR33 [R,R/W] B,H,W ---11111 ICR37 [R,R/W] B,H,W ---11111 ICR41 [R,R/W] B,H,W ---11111 ICR45 [R,R/W] B,H,W ---11111 +2 ICR02 [R,R/W] B,H,W ---11111 ICR06 [R,R/W] B,H,W ---11111 ICR10 [R,R/W] B,H,W ---11111 ICR14 [R,R/W] B,H,W ---11111 ICR18 [R,R/W] B,H,W ---11111 ICR22 [R,R/W] B,H,W ---11111 ICR26 [R,R/W] B,H,W ---11111 ICR30 [R,R/W] B,H,W ---11111 ICR34 [R,R/W] B,H,W ---11111 ICR38 [R,R/W] B,H,W ---11111 ICR42 [R,R/W] B,H,W ---11111 ICR46 [R,R/W] B,H,W ---11111 +3 ICR03 [R,R/W] B,H,W ---11111 ICR07 [R,R/W] B,H,W ---11111 ICR11 [R,R/W] B,H,W ---11111 ICR15 [R,R/W] B,H,W ---11111 ICR19 [R,R/W] B,H,W ---11111 ICR23 [R,R/W] B,H,W ---11111 ICR27 [R,R/W] B,H,W ---11111 ICR31 [R,R/W] B,H,W ---11111 ICR35 [R,R/W] B,H,W ---11111 ICR39 [R,R/W] B,H,W ---11111 ICR43 [R,R/W] B,H,W ---11111 ICR47 [R,R/W] B,H,W ---11111
Block
0000 0440H
0000 0444H
0000 0448H
0000 044CH
0000 0450H
0000 0454H
Interrupt control
0000 0458H
0000 045CH
0000 0460H
0000 0464H
0000 0468H
0000 046CH 0000 0470H to 0000 047CH
Reserved (Continued)
DS07-16908-1E
47
MB91625 Series
Address
Register +0 RSTRR [R] B,H,W 11-X---X*3 +1 RSTCR [R/W] B,H,W 000----0 DIVR0 [R/W] B,H 000----IORR0 [R/W] B,H,W -0000000 IORR4 [R/W] B,H,W -0000000 IORR1 [R/W] B,H,W -0000000 IORR5 [R/W] B,H,W -0000000 PFR0 [R/W] B,H 00000000 PFR4 [R/W] B,H 00000000 PFR8 [R/W] B 00000000 PFR1 [R/W] B,H 00000000 PFR5 [R/W] B,H 00000000 PFR2 [R/W] B,H 00000000 PFR6 [R/W] B,H 00-00-0PFRA [R/W] B 00-00000 PFR3 [R/W] B,H 00000000 PFR7[R/W] B,H 00000000 IORR2 [R/W] B,H,W -0000000 IORR6 [R/W] B,H,W -0000000 IORR3 [R/W] B,H,W -0000000 IORR7 [R/W] B,H,W -0000000 DIVR2 [R/W] B 0011--- +2 STBCR [R/W] B,H,W 0000--11 +3 SLPRR [R/W] B,H,W 00000000
Block Reset control/ Power consumption control Clock division control
0000 0480H 0000 0484H 0000 0488H 0000 048CH 0000 0490H
0000 0494H 0000 0498H to 0000 049CH 0000 04A0H 0000 04A4H 0000 04A8H 0000 04ACH to 0000 04B4H
Peripheral DMA transmission request control
Reserved
Port function register
(Continued)
48
DS07-16908-1E
MB91625 Series
Address 0000 04B8H 0000 04BCH 0000 04C0H 0000 04C4H 0000 04C8H 0000 04CCH 0000 04D0H 0000 04D4H 0000 04D8H 0000 04DCH 0000 04E0H to 0000 04ECH 0000 04F0H
Register +0 EPFR0 [R/W] B,H --000000 EPFR4 [R/W] B,H 00000000 EPFR8 [R/W] B,H ---00000 +1 EPFR1 [R/W] B,H --000000 EPFR5 [R/W] B,H 00000000 +2 EPFR2 [R/W] B,H --000000 EPFR6 [R/W] B,H 00000000 +3 EPFR3 [R/W] B,H --000000 EPFR7 [R/W] B,H ---00000
Block
EPFR9 [R/W] B,H EPFR10 [R/W] B,H EPFR11 [R/W] B,H ---00000 ---00000 ---00000
EPFR12 [R/W] B,H EPFR13 [R/W] B,H EPFR14 [R/W] B,H EPFR15 [R/W] B,H ---00000 ---00000 ---00000 ---00000 EPFR16 [R/W] B,H EPFR17 [R/W] B,H EPFR18 [R/W] B,H EPFR19 [R/W] B,H ---00000 ---00000 00000000 -0000001 EPFR20 [R/W] B,H EPFR21 [R/W] B,H EPFR22 [R/W] B,H EPFR23 [R/W] B,H --000000 --000000 --000000 --000000 EPFR24 [R/W] B,H EPFR25 [R/W] B,H EPFR26 [R/W] B,H EPFR27 [R/W] B,H --000000 --000000 --000000 --000000 EPFR28 [R/W] B,H EPFR29 [R/W] B,H EPFR30 [R/W] B,H EPFR31 [R/W] B,H 00000000 00000000 ----0000 -0000000 EPFR32 [R/W] B,H EPFR33 [R/W] B,H 00000000 --000000 ICSEL0 [R/W] B,H,W -----000 ICSEL4 [R/W] B,H,W ------00 ICSEL8 [R/W] B,H,W ------00 ICSEL12 [R/W] B,H ----0000 ICSEL1 [R/W] B,H,W -----000 ICSEL5 [R/W] B,H,W -----000 ICSEL9 [R/W] B,H,W -----000 ICSEL13 [R/W] B,H -----0-0 ICSEL2 [R/W] B,H,W -----000 ICSEL6 [R/W] B,H,W ------00 ICSEL10 [R/W] B,H,W ----0000 ICSEL14 [R/W] B ------00 ICSEL3 [R/W] B,H,W -----000 ICSEL7 [R/W] B,H,W -------0 ICSEL11 [R/W] B,H,W ----0000 (Continued) Reserved EPFR34 [R/W] B -0000000 Extended port function register
0000 04F4H
0000 04F8H
DMA start request clear select function
0000 04FCH
DS07-16908-1E
49
MB91625 Series
Address 0000 0500H to 0000 050CH 0000 0510H
Register +0 +1 CSELR [R/W] B,H,W 001---00 CMONR [R] B,H,W 001---00 MTMCR [R/W] B,H,W 00001111 CSTBR [R/W] B -0000000 STMCR [R/W] B,H,W 0000-111 +2 +3
Block
Reserved
0000 0514H 0000 0518H 0000 051CH to 0000 0BFCH 0000 0C00H 0000 0C04H 0000 0C08H 0000 0C0CH 0000 0C10H 0000 0C14H 0000 0C18H 0000 0C1CH 0000 0C20H 0000 0C24H 0000 0C28H 0000 0C2CH 0000 0C30H 0000 0C34H
PLLCR [R/W] B,H --000000 11110000 WCRD [R] B,H --000000
Clock generation/ Main timer/ Sub timer Clock counter
WCRL [R/W] B,H WCCR [R,R/W] B --000000 00--0000 DCCR0 [R/W] W 0----000 --00--00 00000000 0-000000
Reserved
DCSR0 [R,R/W] H 0------- -----000
DTCR0 [R/W] H 00000000 00000000
DSAR0 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR0 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR1 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR1 [R,R/W] H 0------- -----000 DTCR1 [R/W] H 00000000 00000000
DSAR1 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR1 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR2 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR2 [R,R/W] H 0------- -----000 DTCR2 [R/W] H 00000000 00000000
DMAC
DSAR2 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR2 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR3 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR3 [R,R/W] H 0------- -----000 DTCR3 [R/W] H 00000000 00000000 (Continued)
50
DS07-16908-1E
MB91625 Series
Address 0000 0C38H 0000 0C3CH 0000 0C40H 0000 0C44H 0000 0C48H 0000 0C4CH 0000 0C50H 0000 0C54H 0000 0C58H 0000 0C5CH 0000 0C60H 0000 0C64H 0000 0C68H 0000 0C6CH 0000 0C70H 0000 0C74H 0000 0C78H 0000 0C7CH 0000 0C80H to 0000 0DF0H 0000 0DF4H
Register +0 +1 +2 +3 DSAR3 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR3 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR4 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR4 [R,R/W] H 0------- -----000 DTCR4 [R/W] H 00000000 00000000
Block
DSAR4 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR4 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR5 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR5 [R,R/W] H 0------- -----000 DTCR5 [R/W] H 00000000 00000000
DSAR5 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR5 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR6 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR6 [R,R/W] H 0------- -----000 DTCR6 [R/W] H 00000000 00000000 DMAC
DSAR6 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR6 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DCCR7 [R/W] W 0----000 --00--00 00000000 0-000000 DCSR7 [R,R/W] H 0------- -----000 DTCR7 [R/W] H 00000000 00000000
DSAR7 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DDAR7 [R/W] W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX DILVR [R,R/W] B ---11111 (Continued)
DS07-16908-1E
51
MB91625 Series
Address 0000 0DF8H 0000 0DFCH to 0000 0F3CH 0000 0F40H 0000 0F44H
Register +0 +1 +2 +3 DMACR [R/W] W 0------- -------- 0------- ------- BT4TMR [R] H 00000000 00000000 BT4STC [R/W] B 0000-000 BT4TMCR [R/W] B,H -0000000 00000000 BT4PDUT / BT4PRLH / BT4DTBF [R/W] H XXXXXXXX XXXXXXXX BT5TMR [R] H 00000000 00000000 BT5STC [R/W] B 0000-000 BT5TMCR [R/W] B,H -0000000 00000000 BT5PDUT / BT5PRLH / BT5DTBF [R/W] H XXXXXXXX XXXXXXXX BT6TMR [R] H 00000000 00000000 BT6STC [R/W] B 0000-000 BT6TMCR [R/W] B,H -0000000 00000000 BT6PDUT / BT6PRLH / BT6DTBF [R/W] H XXXXXXXX XXXXXXXX BT7TMR [R] H 00000000 00000000 BT7STC [R/W] B 0000-000 BT7TMCR [R/W] B,H -0000000 00000000 BT7PDUT / BT7PRLH / BT7DTBF [R/W] H XXXXXXXX XXXXXXXX
Block DMAC
Reserved
Base timer ch.4
0000 0F48H 0000 0F4CH 0000 0F50H 0000 0F54H
BT4PCSR / BT4PRLL [R/W] H XXXXXXXX XXXXXXXX
Base timer ch.5
0000 0F58H 0000 0F5CH 0000 0F60H 0000 0F64H
BT5PCSR / BT5PRLL [R/W] H XXXXXXXX XXXXXXXX
Base timer ch.6
0000 0F68H 0000 0F6CH 0000 0F70H 0000 0F74H
BT6PCSR / BT6PRLL [R/W] H XXXXXXXX XXXXXXXX
0000 0F78H
BT7PCSR / BT7PRLL [R/W] H XXXXXXXX XXXXXXXX BTSEL4567 [R/W] B 00000000
Base timer ch.7
0000 0F7CH
(Continued)
52
DS07-16908-1E
MB91625 Series
Address 0000 0F80H 0000 0F84H
Register +0 +1 +2 +3 BT8TMR [R] H 00000000 00000000 BT8STC [R/W] B 0000-000 BT8TMCR [R/W] B,H -0000000 00000000 BT8PDUT / BT8PRLH / BT8DTBF [R/W] H XXXXXXXX XXXXXXXX BT9TMR [R] H 00000000 00000000 BT9STC [R/W] B 0000-000 BT9TMCR [R/W] B,H -0000000 00000000 BT9PDUT / BT9PRLH / BT9DTBF [R/W] H XXXXXXXX XXXXXXXX BTATMR [R] H 00000000 00000000 BTASTC [R/W] B 0000-000 BTATMCR [R/W] B,H -0000000 00000000 BTAPDUT / BTAPRLH / BTADTBF [R/W] H XXXXXXXX XXXXXXXX BTBTMR [R] H 00000000 00000000 BTBSTC [R/W] B 0000-000 BTBTMCR [R/W] B,H -0000000 00000000 BTBPDUT / BTBPRLH / BTBDTBF [R/W] H XXXXXXXX XXXXXXXX
Block
Base timer ch.8
0000 0F88H 0000 0F8CH 0000 0F90H 0000 0F94H
BT8PCSR / BT8PRLL [R/W] H XXXXXXXX XXXXXXXX
Base timer ch.9
0000 0F98H 0000 0F9CH 0000 0FA0H 0000 0FA4H
BT9PCSR / BT9PRLL [R/W] H XXXXXXXX XXXXXXXX
Base timer ch.10
0000 0FA8H 0000 0FACH 0000 0FB0H 0000 0FB4H
BTAPCSR / BTAPRLL [R/W] H XXXXXXXX XXXXXXXX
0000 0FB8H
BTBPCSR / BTBPRLL [R/W] H XXXXXXXX XXXXXXXX BTSEL89AB [R/W] B 00000000
Base timer ch.11
0000 0FBCH
(Continued)
DS07-16908-1E
53
MB91625 Series
(Continued) Address 0000 0FC0H 0000 0FC4H Register +0 +1 +2 +3 BTCTMR [R] H 00000000 00000000 BTCSTC [R/W] B 0000-000 BTCTMCR [R/W] B,H -0000000 00000000 BTCPDUT / BTCPRLH / BTCDTBF [R/W] H XXXXXXXX XXXXXXXX BTDTMR [R] H 00000000 00000000 BTDSTC [R/W] B 0000-000 BTDTMCR [R/W] B,H -0000000 00000000 BTDPDUT / BTDPRLH / BTDDTBF [R/W] H XXXXXXXX XXXXXXXX BTETMR [R] H 00000000 00000000 BTESTC [R/W] B 0000-000 BTETMCR [R/W] B,H -0000000 00000000 BTEPDUT / BTEPRLH / BTEDTBF [R/W] H XXXXXXXX XXXXXXXX BTFTMR [R] H 00000000 00000000 BTFSTC [R/W] B 0000-000 BTFTMCR [R/W] B,H -0000000 00000000 BTFPDUT / BTFPRLH / BTFDTBF [R/W] H XXXXXXXX XXXXXXXX BTSSSR [W] H XXXXXXXX XXXXXXXX Base timer ch.15 Base timer ch.14 Base timer ch.13 Base timer ch.12 Block
0000 0FC8H 0000 0FCCH 0000 0FD0H 0000 0FD4H
BTCPCSR / BTCPRLL [R/W] H XXXXXXXX XXXXXXXX
0000 0FD8H 0000 0FDCH 0000 0FE0H 0000 0FE4H
BTDPCSR / BTDPRLL [R/W] H XXXXXXXX XXXXXXXX
0000 0FE8H 0000 0FECH 0000 0FF0H 0000 0FF4H
BTEPCSR / BTEPRLL [R/W] H XXXXXXXX XXXXXXXX
0000 0FF8H
BTFPCSR / BTFPRLL [R/W] H XXXXXXXX XXXXXXXX BTSELCDEF [R/W] B 00000000
0000 0FFCH 0000 1000H to 0000 FFFCH
Reserved
*1 : Byte access is available only when accessing the lower 8 bits within 9 bits. *2 : The register of I2C can not be read immediate after reset. *3 : Value just after reset by INIT pin. Do not access the reserved areas. 54 DS07-16908-1E
MB91625 Series
VECTOR TABLE
Interrupt source (Peripheral resource) Reset System reserved System reserved System reserved System reserved System reserved System reserved System reserved System reserved INTE instruction System reserved System reserved Step trace trap System reserved Undefined instruction exception External interrupt request ch.0 to ch.7 External interrupt request ch.8 to ch.15 External interrupt request ch.16 to ch.23 External interrupt request ch.24 to ch.31 16-bit reload timer ch.0 to ch.2 Reception interrupt request of UART/CSIO ch.0 Transmission interrupt request of UART/CSIO ch.0 Transmission bus idle interrupt request of UART/CSIO ch.0 Reception interrupt request of UART/CSIO/ I2C ch.1 Transmission interrupt request of UART/CSIO/ I2C ch.1 Transmission bus idle interrupt request of UART/CSIO ch.1 Status interrupt request of I2C ch.1 Reception interrupt request of UART/CSIO/I C ch.2 Transmission interrupt request of UART/CSIO/I C ch.2 Transmission bus idle interrupt request of UART/CSIO ch.2
2 2
Interrupt Address of Hexa- level setting Offset TBR default Decimal decimal register 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 15(FH) fixed ICR00 ICR01 ICR02 ICR03 ICR04 ICR05 ICR06 ICR07 ICR08 ICR09 ICR10 ICR11 3FCH 3F8H 3F4H 3F0H 3ECH 3E8H 3E4H 3E0H 3D8H 3D4H 3D0H 3C8H 3C4H 3C0H 3BCH 3B8H 3B4H 3B0H 3ACH 3A8H 3A4H 3A0H 39CH 398H 394H 390H 000F FFFCH 000F FFF8H 000F FFF4H 000F FFF0H 000F FFECH 000F FFE8H 000F FFE4H 000F FFE0H 000F FFD8H 000F FFD4H 000F FFD0H 000F FFC8H 000F FFC4H 000F FFC0H 000F FFBCH 000F FFB8H 000F FFB4H 000F FFB0H 000F FFACH 000F FFA8H 000F FFA4H 000F FFA0H 000F FF9CH 000F FF98H 000F FF94H 000F FF90H (Continued)
Interrupt number
3DCH 000F FFDCH
3CCH 000F FFCCH
DS07-16908-1E
55
MB91625 Series
Interrupt source (Peripheral resource) Status interrupt request of I2C ch.2 Reception interrupt request of UART/CSIO/I C ch.3 Transmission interrupt request of UART/CSIO/I C ch.3 Transmission bus idle interrupt request of UART/ CSIO ch.3 Status interrupt request of I2C ch.3 Reception interrupt request of UART/CSIO/I2C ch.4 Transmission interrupt request of UART/CSIO/I2C ch.4 Transmission bus idle interrupt request of UART/ CSIO ch.4 Status interrupt request of I2C ch.4 Reception interrupt request of UART/CSIO/I2C ch.5 Transmission interrupt request of UART/CSIO/I C ch.5 Transmission bus idle interrupt request of UART/ CSIO ch.5 Status interrupt request of I2C ch.5 Reception interrupt request of UART/CSIO/ I2C ch.6 Transmission interrupt request of UART/CSIO/I2C ch.6 Transmission bus idle interrupt request of UART/ CSIO ch.6 Status interrupt request of I2C ch.6 Reception interrupt request of UART/CSIO/I2C ch.7 32-bit input capture ch.4 to ch.7 Transmission interrupt request of UART/CSIO/I2C ch.7 Transmission bus idle interrupt request of UART/ CSIO ch.7 Status interrupt request of I2C ch.7 32-bit output compare ch.4 to ch.7 Reception interrupt request of UART/CSIO/I2C ch.8 to ch.11 Transmission interrupt request of UART/CSIO/ I2C ch.8 to ch.11 Transmission bus idle interrupt request of UART/CSIO ch.8 to ch.11 Transmission FIFO interrupt request UART/CSIO/I2C ch.8 to ch.11 Status interrupt request of I2C ch.8 to ch.11 16-bit up/down counter ch.0 to ch.3 Main timer/Sub timer/Watch counter Unit 0 of 10-bit A/D converter * Scan conversion interrupt request * Priority conversion interrupt request * FIFO overrun interrupt request * Conversion result compare interrupt request 32-bit free run timer ch.0, ch.1 32-bit input capture ch.0 to ch.3 32-bit output compare ch.0 to ch.3
2 2 2
Interrupt level setting HexaDecimal register decimal 28 29 30 31 32 33 34 35 36 1C 1D 1E 1F 20 21 22 23 24 ICR12 ICR13 ICR14 ICR15 ICR16 ICR17 ICR18 ICR19 ICR20
Interrupt number
Offset 38CH 388H 384H 380H 37CH 378H 374H 370H 36CH
Address of TBR default 000F FF8CH 000F FF88H 000F FF84H 000F FF80H 000F FF7CH 000F FF78H 000F FF74H 000F FF70H 000F FF6CH
37
25
ICR21
368H
000F FF68H
38
26
ICR22
364H
000F FF64H
39
27
ICR23
360H
000F FF60H
40 41
28 29
ICR24 ICR25
35CH 358H
000F FF5CH 000F FF58H
42
2A
ICR26
354H
000F FF54H
43 44 45
2B 2C 2D
ICR27 ICR28 ICR29
350H 34CH 348H
000F FF50H 000F FF4CH 000F FF48H (Continued)
56
DS07-16908-1E
MB91625 Series
(Continued) Interrupt source (Peripheral resource) Base timer ch.0 Base timer ch.1 Base timer ch.2 Base timer ch.3 Base timer ch.4, ch.5 Base timer ch.6, ch.7 Base timer ch.8, ch.9 Base timer ch.10, ch.11 Base timer ch.12 Base timer ch.13 Base timer ch.14, ch.15 DMA controller (DMAC) ch.0 DMA controller (DMAC) ch.1 DMA controller (DMAC) ch.2 DMA controller (DMAC) ch.3 DMA controller (DMAC) ch.4 to ch.7 System reserved Delay interrupt System reserved (Used by REALOS) System reserved (Used by REALOS) Used by INT instruction Interrupt Hexa- level setting Decimal register decimal 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 to 255 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 to FF ICR30 ICR31 ICR32 ICR33 ICR34 ICR35 ICR36 ICR37 ICR38 ICR39 ICR40 ICR41 ICR42 ICR43 ICR44 ICR45 ICR46 ICR47 Interrupt number Offset 344H 340H 33CH 338H 334H 330H 32CH 328H 324H 320H 31CH 318H 314H 310H 30CH 308H 304H 300H 2FCH 2F8H 2F4H to 000H Address of TBR default 000F FF44H 000F FF40H 000F FF3CH 000F FF38H 000F FF34H 000F FF30H 000F FF2CH 000F FF28H 000F FF24H 000F FF20H 000F FF1CH 000F FF18H 000F FF14H 000F FF10H 000F FF0CH 000F FF08H 000F FF04H 000F FF00H 000F FEFCH 000F FEF8H 000F FEF4H to 000F FC00H
DS07-16908-1E
57
MB91625 Series
PIN STATUS IN EACH CPU STATE
The terms used for pin status have the following meanings. * When INIT = "L" This is the period when the INIT pin is the "L" level. * When INIT = "H" The status immediately after the INIT pin changes from the "L" level to the "H" level. * SLVL1 This bit is a standby level setting bit in the standby mode control register (STBCR). * Input enabled Indicates that the input function can be used. * Input disabled Indicates that the input function cannot be used. * Output Hi-Z Indicates that the output drive transistor is disabled and the pin is put in the Hi-Z state. * Maintain previous state Maintains the state that was being output immediately prior to entering the current mode. If a built-in peripheral function is operating, the output follows the peripheral function. If the pin is being used as a port, that output is maintained. * Internal input fixed at "0" The input gate connected to the pin is disconnected from the external input and internally connected to "0". * Input enabled when interrupt function selected and enabled Inputs are allowed only when the pin is configured as an external interrupt request input pin and the external interrupt request is enabled.
58
DS07-16908-1E
MB91625 Series
* List of pin status Pin name INIT Initial Value Function name INIT = "L" INIT = "H" Period Period Input enabled Input enabled Input disabled Input disabled Input enabled Input enabled Input enabled Input enabled Input disabled Input disabled Input enabled Input enabled Input enabled Sleep Mode Standby Mode SLVL1 = 0 Input enabled Hi-Z or Input enabled "H" output or Input enabled Hi-Z or Input enabled "H" output or Input enabled Input enabled SLVL1 = 1 Input enabled Hi-Z or Input enabled "H" output or Input enabled Hi-Z or Input enabled "H" output or Input enabled Input enabled
INIT
X0
X0
X1
X1 X0A (When INIT input, see PK1. When port selected, input disabled) X1A (When INIT input, see PK0. When port selected, input disabled) MD0 MD1 P00/TIOA0/SOUT0_1/IN0 P01/TIOB0/SIN0_1/IN1 P02/TIOA1/SCK0_1/IN2 P03/TIOB1/IN3 P04/TIOA2/SOUT1/IN4 P05/TIOB2/SIN1/IN5 P06/TIOA3/SCK1/IN6 P07/TIOB3/IN7 P10/TIOA4/SOUT2/AIN0/INT0 P11/TIOB4/SIN2/BIN0/INT1 P12/TIOA5/SCK2/ZIN0/INT2 P13/TIOB5/INT3 P14/TIOA6/SOUT3/AIN1/INT4 P15/TIOB6/SIN3/BIN1/INT5 P16/TIOA7/SCK3/ZIN1/INT6 P17/TIOB7/INT7
X0A
X1A
MD0 MD1 P00 P01 P02 P03 P04 P05 P06 P07 P10 P11 P12 P13 P14 P15 P16 P17
Output Hi-Z
Output Last state Last state Hi-Z/Input maintained maintained enabled
Output Hi-Z/ Internal input "0" fixed
Output Hi-Z
Output Hi-Z/ Internal input "0" fixed Output Input Last state Last state Hi-Z/Input maintained maintained enabled when enabled the selection of interrupt function is enabled (Continued)
DS07-16908-1E
59
MB91625 Series
Pin name P20 P21 P22 P23 P24 P25 P26 P27 P30 P31 P32 P33 P34 P35 P36 P37 P40 P41 P42 P43 P44 P45 P46 P47
Initial Value Function name P20/TIOA8/SOUT4/AIN2 P21/TIOB8/SIN4/BIN2 P22/TIOA9/SCK4/ZIN2 P23/TIOB9 P24/TIOA10/SOUT5/AIN3/OUT0 P25/TIOB10/SIN5/BIN3/OUT1 P26/TIOA11/SCK5/ZIN3/OUT2 P27/TIOB11/OUT3 P30/TIOA12/SOUT6/INT8 P31/TIOB12/SIN6/INT9 P32/TIOA13/SCK6/INT10 P33/TIOB13/INT11 P34/TIOA14/SOUT7/OUT4/ INT12 P35/TIOB14/SIN7/OUT5/INT13 P36/TIOA15/SCK7/OUT6/INT14 P37/TIOB15/OUT7/INT15 P40/SOUT8 P41/SIN8 P42/SCK8 P43 P44/SOUT9 P45/SIN9 P46/SCK9 P47 Output Hi-Z Output Hi-Z Output Hi-Z INIT = "L" INIT = "H" Period Period
Sleep Mode
Standby Mode SLVL1 = 0 SLVL1 = 1
Output Output Last state Last state Hi-Z/Internal inHi-Z/Input maintained maintained put "0" fixed enabled
Output Hi-Z/Internal input "0" fixed Output Last state Last state Hi-Z/Input maintained maintained enabled Input enabled when the selection of interrupt function is enabled
Output Output Last state Last state Hi-Z/Internal inHi-Z/Input maintained maintained put "0" fixed enabled
(Continued)
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Pin name P50 P51 P52
Initial Value Function name P50/SOUT10/AIN0_1 P51/SIN10/BIN0_1 P52/SCK10/ZIN0_1 INIT = "L" INIT = "H" Period Period
Sleep Mode
Standby Mode SLVL1 = 0 SLVL1 = 1 Output Hi-Z/Internal input "0" fixed Output Hi-Z/Internal input "0" fixed
P53
P53/FRCK1/INT21_2 Output Hi-Z
Input enabled when the selection of interrupt Output Last state Last state function is Hi-Z/Input maintained maintained enabled enabled Output Hi-Z/Internal input "0" fixed
P54
P54/SOUT11/AIN1_1
P55 P56 P57
P55/SIN11/BIN1_1/ADTRG0 P56/SCK11/ZIN1_1/FRCK0 P57
Output Hi-Z/Internal input "0" fixed
(Continued)
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Pin name P60 P61 P62
Initial Value Function name P60/AIN2_1 P61/BIN2_1 P62/ZIN2_1 INIT = "L" INIT = "H" Period Period
Sleep Mode
Standby Mode SLVL1 = 0 SLVL1 = 1 Output Hi-Z/ Internal input "0" fixed Output Hi-Z/ Internal input "0" fixed
P63
P63/FRCK1_1/INT22_2
P64 P65 P66
P64/AIN3_1 P65/BIN3_1/ADTRG0_1 P66/ZIN3_1/FRCK0_1
Output Hi-Z
Output HiZ/Input enabled
Last state maintained or Input enabled
Input enabled when the selection of interrupt function is enabled Last state maintained
Output Hi-Z/ Internal input "0" fixed
Output Hi-Z/ Internal input "0" fixed P67 P67/INT23_2 Input enabled when the selection of interrupt function is enabled
P70 P71 P72 P73 P74 P75 P76 P77
P70/AN0/OUT0_1/INT16 P71/AN1/OUT1_1/INT17 P72/AN2/TMO0/OUT2_1/INT18 P73/AN3/TMO1/OUT3_1/INT19 P74/AN4/TMO2/OUT4_1/INT20 P75/AN5/SOUT0/TMI0/OUT5_1/ INT21 P76/AN6/SIN0/TMI1/OUT6_1/ INT22 P77/AN7/SCK0/TMI2/OUT7_1/ INT23 (Continued) Output Hi-Z Output Last state Last state Hi-Z/Input maintained maintained disabled Output Hi-Z/ Internal input "0" fixed Input enabled when the selection of interrupt function is enabled
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(Continued) Pin name P80 P81 P82 P83 P84 P85 P86 P87 P90 P91 P92 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PK0 PK1 PK2 Initial Value Function name P80/AN8/IN0_1/INT24 P81/AN9/IN1_1/INT25 P82/AN10/IN2_1/INT26 P83/AN11/IN3_1/INT27 P84/AN12/IN4_1/INT28 P85/AN13/IN5_1/INT29 P86/AN14/IN6_1/INT30 P87/AN15/IN7_1/INT31 P90/DA0 P91/DA1 P92 PA0/INT16_1 PA1/INT17_1 PA2/TMO0_1/INT18_1 PA3/TMO1_1/INT19_1 PA4/TMO2_1/INT20_1 PA5/TMI0_1/INT21_1 PA6/TMI1_1/INT22_1 PA7/TMI2_1/INT23_1 PK0 PK1 PK2/ADTRG0_2 Output Hi-Z Internal input "0" fixed Output Hi-Z/Input enabled Output Hi-Z Output Last state Last state Hi-Z/Input maintained maintained disabled Output Hi-Z Output Hi-Z Output Last state Last state Hi-Z/Input maintained maintained disabled INIT = "L" INIT = "H" Period Period Sleep Mode Standby Mode SLVL1 = 0 SLVL1 = 1 Output Hi-Z/ Internal input "0" fixed Input enabled when the selection of interrupt function is enabled
Output Hi-Z/ Output Last state Last state Internal input "0" Hi-Z/Input maintained maintained fixed enabled Output Hi-Z/ Internal input "0" fixed Input enabled when the selection of interrupt function is enabled
Output Hi-Z/ Last state Last state Internal input "0" maintained maintained fixed
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* List of pin status (serial write mode) Pin name INIT X0 X1 X0A Function name During initialization INIT = "L" INIT X0 X1 X0A (When INIT input, see PK1. When port selected, input disabled) X1A (When INIT input, see PK0. When port selected, input disabled) MD0 MD1 P00/TIOA0/SOUT0_1/IN0 P01/TIOB0/SIN0_1/IN1 P02/TIOA1/SCK0_1/IN2 P03/TIOB1/IN3 P04/TIOA2/SOUT1/IN4 P05/TIOB2/SIN1/IN5 P06/TIOA3/SCK1/IN6 P07/TIOB3/IN7 P10/TIOA4/SOUT2/AIN0/INT0 P11/TIOB4/SIN2/BIN0/INT1 P12/TIOA5/SCK2/ZIN0/INT2 P13/TIOB5/INT3 P14/TIOA6/SOUT3/AIN1/INT4 P15/TIOB6/SIN3/BIN1/INT5 P16/TIOA7/SCK3/ZIN1/INT6 P17/TIOB7/INT7 (Continued) Output Hi-Z Output Hi-Z/Input enabled Output Hi-Z/Input enabled Output Hi-Z Output Hi-Z/Input enabled Output Hi-Z/Input enabled Input enabled Input enabled Input disabled Input enabled Input enabled Input disabled During asynchronous write operation During synchronous write operation Input enabled Input enabled Input disabled
INIT = "H"
X1A MD0 MD1 P00 P01 P02 P03 P04 P05 P06 P07 P10 P11 P12 P13 P14 P15 P16 P17
Input disabled Input enabled Input enabled
Input disabled Input enabled Input enabled
Input disabled Input enabled Input enabled
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Pin name P20 P21 P22 P23 P24 P25 P26 P27 P30 P31 P32 P33 P34 P35 P36 P37 P40 P41 P42 P43 P44 P45 P46 P47 P50 P51 P52 P53 P54 P55 P56 P57
Function name
During initialization INIT = "L"
During asynchronous write operation
During synchronous write operation
INIT = "H"
P20/TIOA8/SOUT4/AIN2 P21/TIOB8/SIN4/BIN2 P22/TIOA9/SCK4/ZIN2 P23/TIOB9 P24/TIOA10/SOUT5/AIN3/OUT0 P25/TIOB10/SIN5/BIN3/OUT1 P26/TIOA11/SCK5/ZIN3/OUT2 P27/TIOB11/OUT3 P30/TIOA12/SOUT6/INT8 P31/TIOB12/SIN6/INT9 P32/TIOA13/SCK6/INT10 P33/TIOB13/INT11 P34/TIOA14/SOUT7/OUT4/ INT12 P35/TIOB14/SIN7/OUT5/INT13 P36/TIOA15/SCK7/OUT6/INT14 P37/TIOB15/OUT7/INT15 P40/SOUT8 P41/SIN8 P42/SCK8 P43 P44/SOUT9 P45/SIN9 P46/SCK9 P47 P50/SOUT10/AIN0_1 P51/SIN10/BIN0_1 P52/SCK10/ZIN0_1 P53/FRCK1/INT21_2 P54/SOUT11/AIN1_1 P55/SIN11/BIN1_1/ADTRG0 P56/SCK11/ZIN1_1/FRCK0 P57 (Continued) Output Hi-Z Output Hi-Z/Input enabled Output Hi-Z/Input enabled Output Hi-Z Output Hi-Z/Input enabled Output Hi-Z/Input enabled Output Hi-Z Output Hi-Z/Input enabled Output Hi-Z/Input enabled Output Hi-Z Output Hi-Z/Input enabled Output Hi-Z/Input enabled
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Pin name P60 P61 P62 P63 P64 P65 P66 P67 P70 P71 P72 P73 P74 P75 P76 P77 P80 P81 P82 P83 P84 P85 P86 P87 P90 P91 P92
Function name
During initialization INIT = "L"
During asynchronous write operation
During synchronous write operation
INIT = "H"
P60/AIN2_1 P61/BIN2_1 P62/ZIN2_1 P63/FRCK1_1/INT22_2 P64/AIN3_1 P65/BIN3_1/ADTRG0_1 P66/ZIN3_1/FRCK0_1 P67/INT23_2 P70/AN0/OUT0_1/INT16 P71/AN1/OUT1_1/INT17 P72/AN2/TMO0/OUT2_1/INT18 P73/AN3/TMO1/OUT3_1/INT19 P74/AN4/TMO2/OUT4_1/INT20 P75/AN5/SOUT0/TMI0/OUT5_1/ Output INT21 Hi-Z/Input enabled P76/AN6/SIN0/TMI1/OUT6_1/ INT22 P77/AN7/SCK0/TMI2/OUT7_1/ INT23 P80/AN8/IN0_1/INT24 P81/AN9/IN1_1/INT25 P82/AN10/IN2_1/INT26 P83/AN11/IN3_1/INT27 P84/AN12/IN4_1/INT28 P85/AN13/IN5_1/INT29 P86/AN14/IN6_1/INT30 P87/AN15/IN7_1/INT31 P90/DA0 P91/DA1 P92 (Continued) Output Hi-Z Output Hi-Z/Input enabled Output Hi-Z/Input enabled Output Hi-Z Output Hi-Z/Input disabled Output Hi-Z/Input disabled Output Hi-Z Output Output Hi-Z/ Input enabled Output Hi-Z/ Input disabled Output Output Hi-Z/ Input enabled Output Hi-Z/ Input disabled Output Hi-Z Output Hi-Z/Input disabled Output Hi-Z/Input disabled Output Hi-Z Output Hi-Z/Input enabled Output Hi-Z/Input enabled
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(Continued) Pin name PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PK0 PK1 PK2 Function name During initialization INIT = "L" PA0/INT16_1 PA1/INT17_1 PA2/TMO0_1/INT18_1 PA3/TMO1_1/INT19_1 PA4/TMO2_1/INT20_1 PA5/TMI0_1/INT21_1 PA6/TMI1_1/INT22_1 PA7/TMI2_1/INT23_1 PK0 PK1 PK2/ADTRG0_2 Output Hi-Z Output Hi-Z/Input disabled Output Hi-Z/Input enabled Output Hi-Z/Input disabled Output Hi-Z/Input enabled Output Hi-Z Output Hi-Z/Input disabled Output Hi-Z/Input disabled During asynchronous write operation During synchronous write operation
INIT = "H"
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ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
Parameter Power supply voltage*1, *2 Analog power supply voltage*1, *3 Analog reference voltage* , * Input voltage*1 Analog pin input voltage*1 Output voltage*1 Maximum clamp current Total maximum clamp current "L" level maximum output current*4 "L" level average output current*5 "L" level total maximum output current "L" level total average output current*6 "H" level maximum output current* "H" level average output current*5 "H" level total maximum output current "H" level total average output current*6 Power consumption Operating temperature Storage temperature *2 : VCC must not drop below VSS - 0.3 V. *3 : Be careful not to exceed VCC + 0.3 V, for example, when the power is turned on. *4 : The maximum output current is the peak value for a single pin. *5 : The average output is the average current for a single pin over a period of 100 ms. *6 : The total average output current is the average current for all pins over a period of 100 ms. *7 : If the input current or the maximum input current are limited by some means with external components, the ICLAMP rating supersedes the VI rating. (Continued)
4 1 3
Symbol VCC AVCC AVRH VI VIA VO ICLAMP |ICLAMP| IOL IOLAV IOL IOLAV IOH IOHAV IOH IOHAV PD Ta TSTG
Rating Min Vss - 0.3 Vss - 0.3 Vss - 0.3 Vss - 0.3 Vss - 0.3 Vss - 0.3 Vss - 0.3 -4 - 40 - 55 Max Vss + 4.0 Vss + 4.0 Vss + 4.0 Vcc + 0.3( 4.0) Vss + 6.0 Vss + 4.0 Vcc + 0.3 +4 40 10 4 100 50 - 10 -4 - 100 - 50 500 + 85 + 125
Unit V V V V V V V mA mA mA mA mA mA mA mA mA mA mW C C *8 *8 *7
Remarks
5 V tolerant
*1 : The parameter is based on VSS = AVSS = 0.0 V.
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2. Recommended Operating Conditions
(VSS = AVSS = 0.0 V) Parameter Power supply voltage Analog power supply voltage Analog reference voltage Operating temperature Symbol VCC AVCC AVRH Ta Value Min 2.7 2.7 AVSS - 40 Max 3.6 3.6 AVCC + 85 Unit V V V C AVCC VCC Remarks
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand.
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(Continued) Parameter Symbol (VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Value Pin name Conditions Unit Remarks Min Typ Max P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P67, P70 to P77, P80 to P87, P90 to P92, PA0 to PA7, PK0 to PK2 Pull-up pin Other than VCC, VSS, AVCC, AVSS, AVRH
"H" level output voltage
VOH
VCC = 2.7 V VCC - 0.5 IOH = - 4 mA
VCC
V
"L" level output voltage Input leak current Pull-up resistance value Input capacitance
VOL
VCC = 2.7 V IOL = 4 mA
VSS -5 - 10 16.6
33 10
0.4 +5 + 10 66 15
V A A k pF Digital pin Analog pin
IIL RPU CIN
*1 : When opened, all ports are fixed to output *2 : Ta = + 25 C and VCC = 3.3 V *3 : X0 = 15 MHz, CPU clock = 60 MHz and X0A = when stopped *4 : X0 = STOP and X0A = 32 kHz *V-I characteristics
Conditions Min : Process = Slow, Ta = + 85 C, VCC = 2.7 V Typ : Process = Typical, Ta = + 25 C, VCC = 3.3 V Max : Process = Fast, Ta = - 40 C, VCC = 3.6 V
VOH - IOH
0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -0.5 -0.4 -0.3 -0.2 20 18 16 14 12 10 8 6 4 2 0 0 0.1
VOL - IOL
IOH [mA]
Typ Max Min
-0.1 0
IOL [mA]
Typ Max Min
0.2
0.3
0.4
0.5
VOH-VCC [V]
VOL [V]
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* Operation guaranteed range * When the main clock is selected (DIVB = 000) Power supply voltage VCC (V)
3.6 3.3 3.0 2.7 2.4 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
Internal operation clock FCC (MHz) * When the PLL clock is selected
*1 *2
Power supply voltage VCC (V)
3.6 3.3 3.0 2.7 2.4 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
Internal operation clock FCC (MHz) *1 : DIVB = 111, ODS = 11, and PLL macro oscillation frequency = 30 MHz *2 : DIVB = 000, ODS = 01, and PLL macro oscillation frequency = 60 MHz * When the sub clock is selected (FCL = 32.768 kHz)
DIVB=111 DIVB=110 DIVB=101 DIVB=100 DIVB=011 DIVB=010 DIVB=001 DIVB=000
Power supply voltage VCC (V)
3.6 3.3 3.0 2.7 2.4 0 4 8 12 16 20 24 28 32
Internal operation clock FCC (kHz)
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* Example of configuration * When the main clock is selected (DIVB = 000*1)
24 22 20 18 16 14 12 10 8 6 4 2 0 0 4 8 12 16 20 24 28 32 36 40 44 48
Internal operation clock FCC (MHz)
X0 input frequency (MHz) * When the PLL clock is selected (DIVB = 000*1, PDS = 0000*2) Internal operation clock FCC (MHz)
PMS=1110 PMS=1101 to 0010 PMS=0001 PMS=0000
60 50 40 30 20 10 0
ODS=00
ODS=01 ODS=10 ODS=11
0
4
8
12
16
20
24
28
32
36
40
44
48
X0 input frequency (MHz) * When the PLL clock is selected (DIVB = 000*1, PDS = 0001*2)
PMS=1110 PMS=1101 to 0001 PMS=0000
Internal operation clock FCC (MHz)
60 50 40 30
ODS=01 ODS=00
20
ODS=10
10 0 0 4
ODS=11
8
12
16
20
24
28
32
36
40
44
48
X0 input frequency (MHz) *1 : The values other than DIVB = 000 are omitted. *2 : The values other than PDS = 0000 and 0001 are omitted. Note: DIVB ODS PDS PMS :Base clock division configuration bit :PLL macro oscillation clock division rate select bit :PLL input clock division select bit :PLL clock multiple rate select bit 75
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(2) Sub Clock (SBCLK) Input Standard (VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Parameter Symbol Pin name Conditions Input frequency FCL Input clock cycle Input clock pulse width Input clock rise time and fall time tCYLL tCF tCR X0A, X1A PWH/tCYLL PWL/tCYLL 45 32.768 30.518 55 200 kHz s % ns Value Min Typ 32.768 Max Unit Remarks When crystal oscillator is connected When using external clock When using external clock When using external clock When using external clock
kHz

0.8 x VCC
tCYLH, tCYLL 0.8 x VCC 0.2 x VCC 0.8 x VCC 0.2 x VCC
X0 X0A
PWH tCF
(3) Conditions of PLL
PWL tCR
(VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Parameter PLL oscillation stabilization wait time (LOCK UP time) PLL input clock frequency PLL multiple rate PLL macro oscillation clock frequency Symbol Conditions Value Min 600 4 2 30 Typ Max 24 15 60 Unit s MHz Multiplied by MHz Remarks Time from when the PLL starts operating until the oscillation stabilizes
tLOCK fPLLI fPLLO
(4) Regulator Voltage Stabilization Wait Time (VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Parameter Regulator voltage stabilization wait time Symbol tREG Conditions Value Min 50 Max Unit s Remarks Time taken for the regulator voltage to stabilize
Note : This is the time from when the external power supply stabilizes (after reaching 2.7 V). 76 DS07-16908-1E
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(7) Synchronous serial (CSIO) timing (VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) * Synchronous serial (SPI = 0, SCINV = 0) Parameter Serial clock cycle time SCK SOUT delay time SIN SCK setup time SCK SIN hold time Serial clock "L" pulse width Serial clock "H" pulse width SCK SOUT delay time SIN SCK setup time SCK SIN hold time SCK fall time SCK rise time Symbol tSCYC tSLOVI tIVSHI tSHIXI tSLSH tSHSL tSLOVE tIVSHE tSHIXE tF tR Pin name SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn External shift clock operation Conditions Value Min 4tCYCP - 30 Internal shift clock operation 45 0 2tCYCP - 10 tCYCP + 10 15 20 Max + 30 40 5 5 Unit ns ns ns ns ns ns ns ns ns ns ns
Notes: * The above standards apply to CLK synchronous mode. * tCYCP indicates the peripheral clock cycle time. * When the external load capacitance C = 50pF.
tSCYC VOH SCK VOL tSLOVI VOH SOUT VOL tIVSHI VIHS SIN VILS VILS tSHIXI VIHS VOL
MS bit = 0
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tSLSH VIHS SCK tF VILS tSLOVE VOH SOUT VOL tIVSHE VIHS SIN VILS VILS tSHIXE VIHS VILS VIHS tR
tSHSL VIHS
MS bit = 1
* Synchronous serial (SPI = 0, SCINV = 1) Parameter Serial clock cycle time SCK SOUT delay time SIN SCK setup time SCK SIN hold time Serial clock "L" pulse width Serial clock "H" pulse width SCK SOUT delay time SIN SCK setup time SCK SIN hold time SCK fall time SCK rise time Symbol tSCYC tSHOVI tIVSLI tSLIXI tSLSH tSHSL tSHOVE tIVSLE tSLIXE tF tR Pin name SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn External shift clock operation Conditions Value Min 4tCYCP - 30 Internal shift clock operation 45 0 2tCYCP - 10 tCYCP + 10 15 20 Max + 30 40 5 5 Unit ns ns ns ns ns ns ns ns ns ns ns
Notes: * The above standards apply to CLK synchronous mode. * tCYCP indicates the peripheral clock cycle time. * When the external load capacitance C = 50pF.
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tSCYC VOH SCK tSHOVI VOH SOUT VOL tIVSLI VIHS SIN VILS tSLIXI VIHS VILS VOL VOH
MS bit = 0
tSHSL
tSLSH
VIHS SCK VILS
VIHS VILS tF VILS
tR SOUT
tSHOVE VOH VOL tIVSLE tSLIXE VIHS VILS
SIN
VIHS VILS
MS bit = 1
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* Synchronous serial (SPI = 1,SCINV = 0) Parameter Serial clock cycle time SCK SOUT delay time SIN SCK setup time SCK SIN hold time SOUT SCK delay time Serial clock "L" pulse width Serial clock "H" pulse width SCK SOUT delay time SIN SCK setup time SCK SIN hold time SCK fall time SCK rise time Symbol tSCYC tSHOVI tIVSLI tSLIXI tSOVLI tSLSH tSHSL tSHOVE tIVSLE tSLIXE tF tR Pin name SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SOUTn SCKn SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn External shift clock operation Internal shift clock operation Conditions Value Min 4tcycp - 30 45 0 2tcycp - 30 2tcycp - 10 tcycp + 10 15 20 Max + 30 40 5 5 Unit ns ns ns ns ns ns ns ns ns ns ns ns
Notes: * The above standards apply to CLK synchronous mode. * tCYCP indicates the peripheral clock cycle time. * When the external load capacitance C = 50pF.
tSCYC VOH SCK tSOVLI SOUT VOH VOL tIVSLI SIN VIHS VILS tSLIXI VIHS VILS VOH VOL VOL tSHOVI VOL
MS bit = 0
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tSLSH VIHS VILS * SOUT VOH VOL tIVSLE SIN VIHS VILS tSLIXE VIHS VILS tF VILS tR VIHS
tSHSL VIHS VILS tSHOVE VOH VOL
SCK
MS bit = 1 * : Changes when written to TDR register
* Synchronous serial (SPI = 1, SCINV = 1) Parameter Serial clock cycle time SCK SOUT delay time SIN SCK setup time SCK SIN hold time SOUT SCK delay time Serial clock "L" pulse width Serial clock "H" pulse width SCK SOUT delay time SIN SCK setup time SCK SIN hold time SCK fall time SCK rise time Symbol tSCYC tSLOVI tIVSHI tSHIXI tSOVHI tSLSH tSHSL tSLOVE tIVSHE tSHIXE tF tR Pin name SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SOUTn SCKn SCKn SCKn SOUTn SCKn SINn SCKn SINn SCKn SCKn External shift clock operation Internal shift clock operation Conditions Value Min 4tcycp - 30 45 0 2tcycp - 30 2tcycp - 10 tcycp + 10 15 20 Max + 30 40 5 5 Unit ns ns ns ns ns ns ns ns ns ns ns ns
Notes: * The above standards apply to CLK synchronous mode. * tCYCP indicates the peripheral clock cycle time. * When the external load capacitance C = 50pF.
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tSCYC VOH VOL tSOVHI SOUT VOH VOL tIVSHI SIN VIHS VILS tSHIXI VIHS VILS tSLOVI VOH VOL VOH
SCK
MS bit = 0
tR SCK VILS VOH VOL tIVSHE SIN VIHS VILS VIHS
tSHSL VIHS VILS tSLOVE
tSLSH
tF VIHS VILS
SOUT
VOH VOL tSHIXE VIHS VILS
MS bit = 1
* External clock (EXT = 1) : asynchronous only Parameter Serial clock "L" pulse width Serial clock "H" pulse width SCK fall time SCK rise time Symbol tSLSH tSHSL tF tR CL = 50 pF Conditions Value Min tcycp + 10 tcycp + 10 Max 5 5 Unit ns ns ns ns
tR SCK VILS VIHS
tSHSL VIHS VILS
tSLSH
tF VIHS VILS
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(8) Free-run Timer Clock, Reload Timer Event Input, Up/down Counter Input, Input Capture Input, Interrupt Input Timing (VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Parameter Symbol Pin name FRCKn TMIn INn AINn BINn ZINn INTn Conditions Value Min Max Unit Remarks
2 tCYCP
ns
*1
Input pulse width
tTIWH tTIWL

3 tCYCP 1.0

ns s
*1 *2
*1 : tCYCP indicates peripheral clock cycle time, except when in stop mode, in main timer mode and in watch mode. *2 : When in stop mode, in main timer mode, or in watch mode.
FRCKn TMIn INn AINn BINn ZINn INTn
tTIWH VIHS
tTIWL VIHS
VILS
VILS
(9) A/D Converter Trigger Input Timing (VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Parameter A/D converter trigger input Symbol tTADTGL tTADTGH Pin name ADTRGn Conditions Value Min 2 tCYCP Max Unit ns * Remarks
* : tCYCP indicates peripheral clock cycle time.
tTADTGL ADTRGn
tTADTGH VIHS VIHS
VILS
VILS
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(10) I2C Timing (VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Parameter SCL clock frequency "(Repeated) START condition" hold time SDA SCL SCL clock "L" width SCL clock "H" width "Repeated START condition" setup time SCL SDA Data hold time SCL SDA Symbol fSCL Pin name SCKn (SCLn) SOUTn (SDAn) SCKn (SCLn) SCKn (SCLn) SCKn (SCLn) SCKn (SCLn) SOUTn (SDAn) SCKn (SCLn) SOUTn (SDAn) SCKn (SCLn) SOUTn (SDAn) SCKn (SCLn) CL = 50 pF R = (Vp/IOL)*1 Condition Typical mode Min 0 Max 100 High-speed mode Min 0 Max 400 Unit kHz
tHDSTA
4.0
0.6
s
tLOW tHIGH
4.7 4.0

1.3 0.6

s s s
tSUSTA
4.7
0.6
tHDDAT
0
3.45*2
0
0.9*3
s
Data setup time SDA SCL "STOP condition" setup time SCL SDA Bus free time between "STOP condition" and "START condition" Noise filter
tSUDAT
250
100
ns
tSUSTO
4.0
0.6
s
tBUF
4.7

1.3

s ns
tSP
2tCYCP*4
2tCYCP*4
*1 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current. *2 : The maximum tHDDAT must satisfy that it doesn't extend at least "L" period (tLOW) of device's SCL signal. *3 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device satisfies the requirement of "tSUDAT 250 ns". *4 : tCYCP is the peripheral clock cycle time. To use I2C, set the peripheral bus clock at 8 MHz or more.
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SDA tLOW SCL tSUDAT tSUSTA tBUF
tHDSTA
tHDDAT
tHIGH
tHDSTA
tSP
tSUSTO
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5. Electrical Characteristics for the A/D Converter
(VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Parameter Resolution Total error Linearity error Differential linearity error Zero transition voltage Pin name AN0 to AN15 AN0 to AN15 Value Min - 5.0 - 3.5 -3 - 1.5 Typ + 0.5 Max 10 + 5.0 + 3.5 +3 +4 Unit bit LSB LSB LSB AVCC = 3.3 V, LSB AVRH = 3.3 V Remarks
Full transition voltage Compare time Conversion time Power supply current (analog + digital) Reference power supply current (between AVRH and AVSS) Analog input capacitance Interchannel disparity Analog port input current Analog input voltage Reference voltage
AVRH - 4 0.72*3 1.2*1
AVRH - 1.5
AVRH + 0.5 3.5 11 0.6 5 8.5 4 10 AVRH AVCC
LSB s s PCLK = 33 MHz PCLK = 33 MHz
AVCC
When operating mA A/D (with D/A stopped) A At power-down*2 When operating mA A/D AVRH = 3.0 V A pF LSB A V V At power-down*2
AVRH
AN0 to AN15 AN0 to AN15 AVRH
AVSS AVSS
*1 : It depends on the actual external load and the clock cycle supplied to peripheral resources. Make sure to satisfy PCLK cycle x 4 or over + below (Equation 1). The condition of minimum conversion time is the value when PCLK = 33 MHz, sampling time: 0.424 s, external impedance: 1.4k or below, compare time: 0.72 s. *2 : The current when the CPU is in stop mode and the A/D converter is not operating. *3 : Compare time = {(CT + 1) x 10 + 4} x peripheral clock (PCLK) period. (CT indicates compare time setting bits.) The condition of the minimum compare time is when CT = 1 and PCLK = 33 MHz. (Continued)
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(Continued) AN0 to AN15 Analog input pin Comparator
Rin
Rext
Analog signal source
Cin
Rin
Cin
Approx. 5.3 k Approx. 8.5 pF
The output impedance of the external circuit connected to the analog input affects the sampling time of the A/D converter. Design the output impedance of the output circuit such that the required sampling time is less than the value of TS calculated from the following equation. (Equation1) Ts = Ts Rin Cin Rext (Rin + Rext) x Cin x 8 : Sampling time : Input resistance of A/D = 5.3 k : Input capacitance of A/D = 8.5 pF : Output impedance of external circuit
If the sampling time is set as 600 ns, 600 ns (5.3 k + Rext) x 8.5 pF x 8 Rext 3.5 k And the impedance of the external circuit therefore needs to be 3.5 k or less.
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(Continued) Total error
3FFH 1.5 LSB' 3FEH 3FDH {1 LSB' (N - 1) + 0.5 LSB'}
Actual conversion characteristics
Digital output
004H 003H 002H 001H
VNT (Actually-measured value) Actual conversion characteristics
Ideal characteristics
0.5 LSB'
AVSS
Analog input
AVRH
1 LSB' (Ideal value) Total error of digital output N
AVRH - AVSS [V] 1024 VNT - {1 LSB' x (N - 1) + 0.5 LSB'} = 1 LSB' =
N : A/D converter digital output value. VNT : Voltage at which the digital output changes from (N + 1)H to NH. VOT' (Ideal value) = AVSS + 0.5 LSB [V] VFST' (Ideal value) = AVRH - 1.5 LSB [V]
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6. Electrical Characteristics for the D/A Converter
(VCC = AVCC = 2.7 V to 3.6 V, VSS = AVSS = 0 V, Ta = - 40 C to + 85 C) Parameter Resolution Linearity error Differential linearity error Pin name Conversion time Analog output impedance DA0, DA1 3.19 3.0 3.51 5.85 s k 10 s conversion, when the output is unloaded (When 2 channels operating, A/D stopped) When the input digital code is fixed at 7AH or 85H (When 2 channels operating, A/D stopped) At power-down (When A/D stopped) Value Min - 2.0 - 1.0 Typ 0.6 Max 8 + 2.0 + 1.0 Unit bit LSB LSB s When the output is unloaded When the output is unloaded When load capacitance (CL) = 20 pF When load capacitance (CL) = 100 pF Remarks
300
A
Analog current
AVCC 3600* A
11
A
* : The current consumption of the D/A converter varies with input digital code. The standard value indicates the current consumed when the digital code that maximizes the current consumption is input.
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7. Flash Memory Write/Erase Characteristics
(VCC = 3.3 V, Ta = + 25 C) Parameter Sector erase time Half word (16 bits) write time Chip erase time*1 Erase/write cycles Flash memory data hold time Value Min 10000 10*2 Typ 0.9 23 7.2 Max 3.6 370 28.8 Unit s s s cycle year Remarks Excludes write time prior to internal erase Not including system-level overhead time. Excludes write time prior to internal erase (When equipped with 512 Kbytes) Average Ta + 85 C Average Ta + 85 C
*1: The chip erase time is the sector erase time multiplied across all sectors. *2: This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at + 85 C) .
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PACKAGE DIMENSION
100-pin plastic LQFP Lead pitch Package width x package length Lead shape Sealing method Mounting height Weight 0.50 mm 14.0 mm x 14.0 mm Gullwing Plastic mold 1.70 mm Max 0.65 g P-LFQFP100-14x14-0.50
(FPT-100P-M20)
Code (Reference)
100-pin plastic LQFP (FPT-100P-M20)
16.000.20(.630.008)SQ
Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder.
* 14.000.10(.551.004)SQ
75 51
76
50
0.08(.003) Details of "A" part
INDEX
1.50 -0.10 .059 -.004 (Mounting height)
26
+0.20
+.008
100
0.100.10 (.004.004) (Stand off) 0.25(.010)
0~8 "A" 0.500.20 (.020.008) 0.600.15 (.024.006)
1
25
0.50(.020)
0.200.05 (.008.002)
0.08(.003)
M
0.1450.055 (.0057.0022)
C
2005 -2008 FUJITSU MICROELECTRONICS LIMITED F100031S-c-3-3
Dimensions in mm (inches). Note: The values in parentheses are reference values
Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/
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FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3329 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fmal.fujitsu.com/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department

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